參數資料
型號： EVAL-ADUC7121QSPZ
廠商： Analog Devices Inc
文件頁數： 81/96頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR ADUC7121
設計資源： ADUC7121 Gerber Files
ADUC7121 Schematic
標準包裝： 1
系列： MicroConverter® ADuC7xxx
類型： MCU
適用于相關產品： ADUC7121
所含物品： 板，CD
ADuC7121
Data Sheet
Rev. B | Page 82 of 96
VIC MMRs
IRQBASE Register
The vector base register, IRQBASE, is used to point to the start
address of memory used to store 32 pointer addresses. These
pointer addresses are the addresses of the individual interrupt
service routines.
Name:
IRQBASE
Address:
0xFFFF0014
Default value: 0x00000000
Access:
Read and write
Table 112. IRQBASE MMR Bit Designations
Bit
Type
Initial Value
Description
31:16
Read only
Reserved
Always read as 0
15:0
Read and write
0
Vector base address
IRQVEC Register
The IRQ interrupt vector register, IRQVEC points to a memory
address containing a pointer to the interrupt service routine of
the currently active IRQ. Read this register only when an IRQ
occurs and IRQ interrupt nesting has been enabled by setting
Bit 0 of the IRQCONN register.
Name:
IRQVEC
Address:
0xFFFF001C
Default value: 0x00000000
Access:
Read and write
Table 113. IRQVEC MMR Bit Designations
Bit
Type
Initial
Value
Description
31:23
Read only
0
Always read as 0.
22:7
Read and
write
0
IRQBASE register value.
6:2
Read only
0
Highest priority source. This is a
value between 0 and 27
representing the possible
interrupt sources. For example, if
the highest currently active IRQ is
Timer2, these bits are [00100].
1:0
Reserved
0
Reserved bits.
Priority Registers
IRQP0 Register
Name:
IRQP0
Address:
0xFFFF0020
Default value: 0x00000000
Access:
Read and write
Table 114. IRQP0 MMR Bit Designations
Bit
Name
Description
31
Reserved
Reserved bit.
30:28
IDAC_Fault
A priority level of 0 to 7 can be set for an
IDAC fault interrupt.
27
Reserved
Reserved bit.
26:24
T4PI
A priority level of 0 to 7 can be set for
Timer4.
23
Reserved
Reserved bit.
22:20
T3PI
A priority level of 0 to 7 can be set for
Timer3.
19
Reserved
Reserved bit.
18:16
T2PI
A priority level of 0 to 7 can be set for
Timer2.
15
Reserved
Reserved bit.
14:12
T1PI
A priority level of 0 to 7 can be set for
Timer1.
11
Reserved
Reserved bit.
10:8
T0PI
A priority level of 0 to 7 can be set for
Timer0.
7
Reserved
Reserved bit.
6:4
SWINTP
A priority level of 0 to 7 can be set for the
software interrupt source.
3:0
Reserved
Reserved bit.
IRQP1 Register
Name:
IRQP1
Address:
0xFFFF0024
Default value: 0x00000000
Access:
Read and write
Table 115. IRQP1 MMR Bit Designations
Bit
Name
Description
31
Reserved
Reserved bit.
30:28
I2C0MPI
A priority level of 0 to 7 can be set for I2C 0
master.
27
Reserved
Reserved bit.
26:24
SPIPI
A priority level of 0 to 7 can be set for SPI.
23
Reserved
Reserved bit.
22:20
UARTPI
A priority level of 0 to 7 can be set for UART.
19
Reserved
Reserved bit.
18:16
ADCPI
A priority level of 0 to 7 can be set for the
ADC interrupt source.
15
Reserved
Reserved bit.
14:12
Flash1PI
A priority level of 0 to 7 can be set for the
Flash block 1 controller interrupt source.
11
Reserved
Reserved bit.
10:8
Flash0PI
A priority level of 0 to 7 can be set for the
Flash Block 0 controller interrupt source.
7:3
Reserved
Reserved bits.
2:0
PSMPI
A priority level of 0 to 7 can be set for the
power supply monitor interrupt source.
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