參數(shù)資料
型號: EVAL-ADUC7121QSPZ
廠商: Analog Devices Inc
文件頁數(shù): 22/96頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR ADUC7121
設(shè)計資源: ADUC7121 Gerber Files
ADUC7121 Schematic
標準包裝: 1
系列: MicroConverter® ADuC7xxx
類型: MCU
適用于相關(guān)產(chǎn)品: ADUC7121
所含物品: 板,CD
Data Sheet
ADuC7121
Rev. B | Page 29 of 96
amplifiers are not saturated. The input buffer is a rail-to-rail
buffer. It can accept signals from 0.15 to AVDD 0.15 V. Both
the positive and negative input buffers can be bypassed indepen-
dently by setting ADCCON Bits[15:14].
Typical Operation
Once configured via the ADC control and channel selection
12-bit result in the ADC data register.
The top four bits are the sign bits, and the 12-bit result is placed
from Bit 27 to Bit 16, as shown in Figure 16. Again, note that, in
fully differential mode, the result is represented in twos comple-
ment format, and when in pseudo differential and single-ended
modes, the result is represented in straight binary format.
Figure 16. ADC Result Format
Timing
Figure 17 provides details of the ADC timing. Users control the
ADC clock speed and the number of acquisition clocks in the
ADCCON MMR. By default, the acquisition time is eight clocks
and the clock divider is two. The number of additional clocks
(such as bit trial or write) is set to 19, giving a sampling rate of
774 kSPS. For conversion on the temperature sensor, the ADC
acquisition time is automatically set to 16 clocks and the ADC
clock divider is set to 32. When using multiple channels, including
the temperature sensor, the timing settings revert back to the
user-defined settings after reading the temperature sensor channel.
Figure 17. ADC Timing
TEMPERATURE SENSOR
The ADuC7121 provides a voltage output from an on-chip
band gap reference proportional to absolute temperature. This
voltage output can also be routed through the front-end ADC
multiplexer (effectively, an additional ADC channel input),
facilitating an internal temperature sensor channel that
measures die temperature.
The internal temperature sensor is not designed for use as an
absolute ambient temperature calculator. It is intended for use as an
approximate indicator of the temperature of the ADuC7121 die.
The typical temperature coefficient is 1.25 mV/°C.
Figure 18. ADC Output vs. Temperature
ADC MMR Interface
The ADC is controlled and configured via a number of MMRs
(see Table 28) that are described in detail in this section.
Table 28. ADC MMRs
Name
Description
ADCCON
ADC control register. ADCCON allows the programmer
to enable the ADC peripheral, to select the mode of
operation of the ADC (either single-ended, pseudo
differential, or fully differential mode), and to select
the conversion type (see Table 29).
ADCCP
ADC positive channel selection register.
ADCCN
ADC negative channel selection register.
ADCSTA
ADC status register. ADCSTA indicates when an ADC
conversion result is ready. The ADCSTA register contains
only one bit, ADCREADY (Bit 0), representing the
status of the ADC. This bit is set at the end of an ADC
conversion generating an ADC interrupt. It is cleared
automatically by reading the ADCDAT MMR. When
the ADC is performing a conversion, the status of the
ADC can be read externally via the ADCBusy function
of Pin C3. This pin is high during a conversion. When
the conversion is finished, ADCBusy returns to low. This
information can be available on P0.2 (see the
the GP0CON register.
ADCDAT
ADC data result register. ADCDAT holds the 12-bit
ADC result, as shown in Figure 16.
ADCRST
ADC reset register. ADCRST resets all of the ADC
registers to their default values.
ADCGN
ADC gain calibration register for non-PGA channels.
ADCOF
ADC offset calibration register for all ADC channels.
PGA_GN
Gain of PGA_PADC0 and PGA_PADC1.
SIGN BITS
12-BIT ADC RESULT
31
27
16 15
0
0
949
2-
0
15
ADC CLOCK
ACQ
BIT TRIAL
DATA
ADCSTA = 0
ADCSTA = 1
ADC INTERRUPT
WRITE
CONVSTART
ADCBUSY
ADCDAT
09
492-
016
0
949
2-
0
17
1250
1000
1050
1100
1150
1200
–20
0
40
60
80
20
100
AD
CDAT
(
d
B)
TEMPERATURE (°C)
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