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參數(shù)資料
| 型號(hào)： | E-1110 |
| 英文描述： | E-1110 10/100/1000 Mbits/s Ethernet MAC preliminary technical manual 4/01 |
| 中文描述： | 電子1110 10/100/1000 Mbits /秒以太網(wǎng)MAC初步的技術(shù)手冊(cè)4 / 01 |
| 文件頁(yè)數(shù)： | 72/108頁(yè) |
| 文件大小： | 577K |
| 代理商： | E-1110 |
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3-28
Signals
E110_HRST_L
Asynchronous System Reset
Output
The E110_HRST_L signal is an active-LOW signal from
the E-1110 that initializes the E-110 MAC function. When
E110_HRST_L is asserted, the MAC asserts the
synchronized transmit and receive reset signals,
E110_TRST_L and E110_RRST_L, which are inputs to
the MAC transmit function and receive function,
respectively. Other modules in an ASIC may use these
signals for initialization. Both E110_TRST_L and
E110_RRST_L are asserted LOW asynchronously when
E110_HRST_L occurs and are deasserted
synchronously with their respective clocks
(E110_TRST_L with MII_TCLK and E110_RRST_L with
MII_RCLK).
The MAC assumes that E110_HRST_L is asynchronous
to all clocks. The minimum reset width is 400 ns for the
100 Mbits/s mode of operation and 4000 ns for the
10 Mbits/s mode.
E110_RPD[7:0]
E-110 Receive Data to Host
Input
The E110_RPD[7:0] signals are the receive data bus.
The signals hold the received data byte for two MII_RCLK
clock cycles. The E110_RPD[7:0] signals are connected
to the E-1110.
E110_RPSF
E-110 Receive Start of Frame
Input
The E-110 MAC asserts the E110_RPSF signal for one
MII_RCLK clock cycle to indicate that the rst byte of a
receive packet is available to the host on E110_RPD[7:0].
E110_RPEF
E-110 Receive End of Frame
Input
The MAC asserts the E110_RPEF signal for one
MII_RCLK clock cycle to indicate that the last byte of the
receive packet is available to the E-1110 on
E110_RPD[7:0].
E110_RPDV
E-110 Receive Packet Data Valid
Input
A packet transmission from the MAC receive function to
the E-1110 begins when the receive function asserts the
E110_RPSF and E110_RPDV signals at the rst byte of
the received packet data on E110_RPD[7:0] after
removing the preamble and SFD. For subsequent data
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