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參數(shù)資料
| 型號(hào)： | E-1110 |
| 英文描述： | E-1110 10/100/1000 Mbits/s Ethernet MAC preliminary technical manual 4/01 |
| 中文描述： | 電子1110 10/100/1000 Mbits /秒以太網(wǎng)MAC初步的技術(shù)手冊(cè)4 / 01 |
| 文件頁(yè)數(shù)： | 68/108頁(yè) |
| 文件大?。?/td> | 577K |
| 代理商： | E-1110 |
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3-24
Signals
E1110_RXD[3:0] are valid. In TBI mode the data is
10 bits wide with E1110_RXD[9] as the MSB.
E1110_RXD[8]/E1110_RX_DV
Receive Data Valid
Input
E1110_RX_DV is an active-HIGH signal. When it is
asserted, the receive data (E1110_RXD[9:0]) can be
sampled synchronously with E1110_PHY_RCLK. This
signal is valid only in MII/GMII modes and is shared with
bit 8 of the TBI receive data input stream in the
MII/GMII/TBI mode.
E1110_RXD[9]/E1110_RX_ER
Receive Error
Input
E1110_RX_ER, when asserted, indicates that a data
error has been detected during the frame receive
operation. This signal is valid only in MII/GMII modes and
is shared with bit 9 of the TBI receive data input stream
input in the MII/GMII/TBI mode.
E1110_TBI_RCLK
TBI Receive Clock (RBC1)
Input
In the TBI Mode, E1110_TBI_RCLK is a TBI receive
62.5 MHz clock input signal. It is used to synchronize the
data in 1000BASE-X TBI mode. The even byte lane data
is clocked out of the PMA on this clock.
In the test scan mode, this clock is output on
PCS_TBI_RCLK for scan mode testing of the PCS soft
macro.
E1110_TBI_RCLKN
TBI Receive Clock (RBC0)
Input
In the TBI Mode, E1110_TBI_RCLKN is a TBI receive
62.5 MHz clock input signal. It is used to synchronize the
data in 1000BASE-X TBI mode. The odd byte lane data
is clocked out of the PMA on this clock. This clock is 180
phase shifted from E1110_TBI_RCLK and the data is
sampled on both the clocks with respect to the positive
edges.
In the test scan mode, this clock is output on
PCS_TBI_RCLKN for scan mode testing of the PCS soft
macro.
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