參數(shù)資料
型號： DSPE56007FJ66
英文描述： DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC
中文描述： 數(shù)字信號處理器| 24位|的CMOS | QFP封裝| 80腳|塑料
文件頁數(shù)： 20/83頁
文件大?。?/td> 382K
代理商： DSPE56007FJ66
1-14
DSP56007/D
MOTOROLA
Signal/Connection Descriptions
Serial Audio Interface (SAI)
WSR
Input or
Output
Tri-stated
Word Select Receive (WSR)
—WSR is an output if the
receiver section is configured as a master, and a
Schmitt-trigger input if configured as a slave. WSR is
used to synchronize the data word and to select the
left/ right portion of the data sample.
Note:
WSR is high impedance if all receivers are disabled
(individual reset), during hardware reset, during
software reset, or while the DSP is in the Stop state.
While in the high impedance state, the internal
input buffer is disconnected from the signal and no
external pull-up is necessary.
Table 1-9
Serial Audio Interface (SAI) Receiver signals (Continued)
Signal
Name
Signal
Type
State during
Reset
Signal Description
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