- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377002 > DSPE56007FJ66 DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC PDF資料下載
參數(shù)資料
| 型號(hào)： | DSPE56007FJ66 |
| 英文描述： | DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC |
| 中文描述： | 數(shù)字信號(hào)處理器| 24位|的CMOS | QFP封裝| 80腳|塑料 |
| 文件頁數(shù)： | 19/83頁 |
| 文件大?。?/td> | 382K |
| 代理商： | DSPE56007FJ66 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁
Signal/Connection Descriptions
Serial Audio Interface (SAI)
MOTOROLA
DSP56007/D
1-13
SERIAL AUDIO INTERFACE (SAI)
The SAI is composed of separate receiver and transmitter sections.
SAI Receiver Section
Table 1-9
Serial Audio Interface (SAI) Receiver signals
Signal
Name
Signal
Type
State during
Reset
Signal Description
SDI0
Input
Tri-stated
Serial Data Input 0
—While in the high impedance
state, the internal input buffer is disconnected from
the pin and no external pull-up is necessary. SDI0 is
the serial data input for receiver 0.
Note:
This signal is high impedance during hardware or
software reset, while receiver 0 is disabled
(R0EN = 0), or while the DSP is in the Stop state.
SDI1
Input
Tri-stated
Serial Data Input 1
—While in the high impedance
state, the internal input buffer is disconnected from
the pin and no external pull-up is necessary. SDI1 is
the serial data input for receiver 1.
Note:
This signal is high impedance during hardware or
software reset, while receiver 1 is disabled
(R1EN = 0), or while the DSP is in the Stop state.
SCKR
Input or
Output
Tri-stated
Receive Serial Clock
—SCKR is an output if the
receiver section is programmed as a master, and a
Schmitt-trigger input if programmed as a slave. While
in the high impedance state, the internal input buffer
is disconnected from the pin and no external pull-up is
necessary.
Note:
SCKR is high impedance if all receivers are
disabled (individual reset) and during hardware or
software reset, or while the DSP is in the Stop state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSPE56007FJ88 | DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC |
| DSPCOMMANDUM | Universal Command Converter for DSP User＇s Manual |
| DSPCOMMPARALLELUM | Parallel Port Command Converter for DSP User＇s Manual |
| DSPCOMMPCIUM | PCI Command Converter for DSP User＇s Manual |
| DSPG4001-71 | Telecommunication IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSPF3-S7-120V | 制造商:Black Box Corporation 功能描述:DIGITAL SIGNAGE POWER FILTER |
| DSPF3-S7-120V-W1 | 制造商:Black Box Corporation 功能描述:1 YEAR WARRANTY FOR DSPF3-S7-120V |
| DSPF3-S7-120V-W3 | 制造商:Black Box Corporation 功能描述:3 YEAR WARRANTY FOR DSPF3-S7-120V |
| DSPF56362PV100 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DSPFPK52 | 制造商:BARRY CONTROLS/VLIER 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。