參數(shù)資料
型號(hào): DSPB56362AG120
廠商: Freescale Semiconductor
文件頁數(shù): 76/152頁
文件大?。?/td> 0K
描述: IC DSP 24BIT AUD 120MHZ 144-LQFP
標(biāo)準(zhǔn)包裝: 60
系列: DSP56K/Symphony
類型: 音頻處理器
接口: 主機(jī)接口,I²C,SAI,SPI
時(shí)鐘速率: 120MHz
非易失內(nèi)存: ROM(126 kB)
芯片上RAM: 42kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
Overview
DSP56362 Technical Data, Rev. 4
Freescale Semiconductor
1-3
1.1
Features
Multimode, multichannel decoder software functionality
— Dolby Digital and Pro Logic
— MPEG2 5.1
—DTS
— Bass management
Digital audio post-processing capabilities
— 3D Virtual surround sound
— Lucasfilm THX5.1
— Soundfield processing
— Equalization
Digital Signal Processing Core
— 100 MIPS with a 100 MHz clock at 3.3 V +/- 5%
— Object code compatible with the DSP56000 core
— Highly parallel instruction set
— Data arithmetic logic unit (ALU)
– Fully pipelined 24 x 24-bit parallel multiplier-accumulator (MAC)
– 56-bit parallel barrel shifter (fast shift and normalization; bit stream generation and parsing)
– Conditional ALU instructions
– 24-bit or 16-bit arithmetic support under software control
— Program control unit (PCU)
– Position independent code (PIC) support
– Addressing modes optimized for DSP applications (including immediate offsets)
– On-chip instruction cache controller
– On-chip memory-expandable hardware stack
– Nested hardware DO loops
– Fast auto-return interrupts
— Direct memory access (DMA)
– Six DMA channels supporting internal and external accesses
– One-, two-, and three- dimensional transfers (including circular buffering)
– End-of-block-transfer interrupts
– Triggering from interrupt lines and all peripherals
— Phase-locked loop (PLL)
– Software programmable PLL-based frequency synthesizer for the core clock
– Allows change of low-power divide factor (DF) without loss of lock
– Output clock with skew elimination
— Hardware debugging support
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