參數(shù)資料
型號： DSPB56362AG120
廠商： Freescale Semiconductor
文件頁數(shù)： 64/152頁
文件大?。?/td> 0K
描述： IC DSP 24BIT AUD 120MHZ 144-LQFP
標準包裝： 60
系列： DSP56K/Symphony
類型： 音頻處理器
接口： 主機接口，I²C，SAI，SPI
時鐘速率： 120MHz
非易失內(nèi)存： ROM（126 kB）
芯片上RAM： 42kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 3.30V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 144-LQFP
供應商設(shè)備封裝： 144-LQFP（20x20）
包裝： 托盤
Host Interface (HDI08)
DSP56362 Technical Data, Rev. 4
Freescale Semiconductor
2-13
HOREQ/HORE
HTRQ/HTRQ
PB14
Output
Input, Output, or
Disconnected
GPIO Disconnected Host Request—When HDI08 is programmed to interface a
single host request host bus and the HI function is selected, this
signal is the host request (HOREQ) output. The polarity of the
host request is programmable, but is configured as active-low
(HOREQ) following reset. The host request may be programmed
as a driven or open-drain output.
Transmit Host Request—When HDI08 is programmed to
interface a double host request host bus and the HI function is
selected, this signal is the transmit host request (HTRQ) output.
The polarity of the host request is programmable, but is
configured as active-low (HTRQ) following reset. The host
request may be programmed as a driven or open-drain output.
Port B 14—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
HACK/HACK
HRRQ/HRRQ
PB15
Input
Output
Input, Output, or
Disconnected
GPIO Disconnected Host Acknowledge—When HDI08 is programmed to interface
a single host request host bus and the HI function is selected,
this signal is the host acknowledge (HACK) Schmitt-trigger input.
The polarity of the host acknowledge is programmable, but is
configured as active-low (HACK) after reset.
Receive Host Request—When HDI08 is programmed to
interface a double host request host bus and the HI function is
selected, this signal is the receive host request (HRRQ) output.
The polarity of the host request is programmable, but is
configured as active-low (HRRQ) after reset. The host request
may be programmed as a driven or open-drain output.
Port B 15—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Table 2-9 Host Interface (continued)
Signal Name
Type
State during Reset
Signal Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSPB56362AG120 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor
DSPB56362PV100 制造商:Rochester Electronics LLC 功能描述:DIGITAL AUDIO DSP - Bulk
DSPB56362PV120 制造商:Rochester Electronics LLC 功能描述:DIGITAL AUDIO DSP - Bulk
DSPB56364AF100 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DSP56364 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
DSPB56364FU100 制造商:Rochester Electronics LLC 功能描述:24 BIT AUDIO DSP - Bulk 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
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