參數(shù)資料
型號: DSP56367P
廠商: 飛思卡爾半導體(中國)有限公司
元件分類: 數(shù)字信號處理
英文描述: 24-Bit Audio Digital Signal Processor
中文描述: 24位音頻數(shù)字信號處理器
文件頁數(shù): 63/100頁
文件大?。?/td> 1039K
代理商: DSP56367P
Serial Host Interface SPI Protocol Timing
DSP56367 Technical Data, Rev. 2.1
Freescale Semiconductor
3-39
Figure 3-27 SPI Master Timing (CPHA = 0)
160
SS deassertion pulse width (CPHA = 0)
Slave
T
C
+ 6
12.7
ns
161
HREQ in assertion to first SCK edge
Master
Bypassed
Narrow
Wide
0.5
×
t
SPICC
+ 2.5
×
T
C
+ 43
0.5
×
t
SPICC
+ 2.5
×
T
C
+ 43
0.5
×
t
SPICC
+ 2.5
×
T
C
+ 43
97.8
160.8
196.8
ns
162
HREQ in deassertion to last SCK
sampling edge (HREQ in set-up time)
(CPHA = 1)
Master
0
0
ns
163
First SCK edge to HREQ in not asserted
(HREQ in hold time)
Master
0
0
ns
1
V
CC
= 1.8 V ± 5%; T
J
= –40°C to +95°C, C
L
= 50 pF
2
The timing values calculated are based on simulation data at 150MHz. Tester restrictions limit SHI testing to lower clock
frequencies.
3
Periodically sampled, not 100% tested
Table 3-16 Serial Host Interface SPI Protocol Timing (continued)
No.
Characteristics
1
Mode
Filter
Mode
Expression
2
Min
Max
Unit
SS
(Input)
SCK (CPOL = 0)
(Output)
SCK (CPOL = 1)
(Output)
MISO
(Input)
Valid
MOSI
(Output)
MSB
Valid
LSB
MSB
LSB
HREQ
(Input)
141
142
143
144
144
141
144
144
143
142
148
149
149
148
152
153
163
161
AA0271
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