參數(shù)資料
型號(hào): DSP56367P
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類: 數(shù)字信號(hào)處理
英文描述: 24-Bit Audio Digital Signal Processor
中文描述: 24位音頻數(shù)字信號(hào)處理器
文件頁數(shù): 23/100頁
文件大小: 1039K
代理商: DSP56367P
JTAG/OnCE Interface
DSP56367 Technical Data, Rev. 2.1
Freescale Semiconductor
2-19
2.16
JTAG/OnCE Interface
Table 2-15 JTAG/OnCE Interface
Signal
Name
Signal Type
State during
Reset
Signal Description
TCK
Input
Input
Test Clock
—TCK is a test clock input signal used to synchronize the JTAG test
logic. It has an internal pull-up resistor.
This input is 3.3V tolerant.
TDI
Input
Input
Test Data Input
—TDI is a test data serial input signal used for test instructions
and data. TDI is sampled on the rising edge of TCK and has an internal pull-up
resistor.
This input is 3.3V tolerant.
TDO
Output
Tri-Stated
Test Data Output
—TDO is a test data serial output signal used for test
instructions and data. TDO is tri-statable and is actively driven in the shift-IR
and shift-DR controller states. TDO changes on the falling edge of TCK.
TMS
Input
Input
Test Mode Select
—TMS is an input signal used to sequence the test
controller’s state machine. TMS is sampled on the rising edge of TCK and has
an internal pull-up resistor.
This input is 3.3V tolerant.
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