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    參數(shù)資料
    型號(hào): DSP56367P
    廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
    元件分類: 數(shù)字信號(hào)處理
    英文描述: 24-Bit Audio Digital Signal Processor
    中文描述: 24位音頻數(shù)字信號(hào)處理器
    文件頁(yè)數(shù): 14/100頁(yè)
    文件大小: 1039K
    代理商: DSP56367P
    Parallel Host Interface (HDI08)
    DSP56367 Technical Data, Rev. 2.1
    2-10
    Freescale Semiconductor
    HCS
    HA10
    PB13
    Input
    Input
    Input, Output, or
    Disconnected
    GPIO
    Disconnected
    Host Chip Select—
    When HDI08 is programmed to interface a
    nonmultiplexed host bus and the HI function is selected, this signal is the host
    chip select (HCS) input. The polarity of the chip select is programmable, but
    is configured active-low (HCS) after reset.
    Host Address 10
    —When HDI08 is programmed to interface a multiplexed
    host bus and the HI function is selected, this signal is line 10 of the host
    address (HA10) input bus.
    Port B 13
    —When the HDI08 is configured as GPIO, this signal is individually
    programmed as input, output, or internally disconnected.
    The default state after reset for this signal is GPIO disconnected.
    This input is 3.3V tolerant.
    HOREQ/
    HOREQ
    HTRQ/
    HTRQ
    PB14
    Output
    Output
    Input, Output, or
    Disconnected
    GPIO
    Disconnected
    Host Request
    —When HDI08 is programmed to interface a single host
    request host bus and the HI function is selected, this signal is the host request
    (HOREQ) output. The polarity of the host request is programmable, but is
    configured as active-low (HOREQ) following reset. The host request may be
    programmed as a driven or open-drain output.
    Transmit Host Request—
    When HDI08 is programmed to interface a double
    host request host bus and the HI function is selected, this signal is the transmit
    host request (HTRQ) output. The polarity of the host request is
    programmable, but is configured as active-low (HTRQ) following reset. The
    host request may be programmed as a driven or open-drain output.
    Port B 14
    —When the HDI08 is configured as GPIO, this signal is individually
    programmed as input, output, or internally disconnected.
    The default state after reset for this signal is GPIO disconnected.
    This input is 3.3V tolerant.
    HACK/
    HACK
    HRRQ/
    HRRQ
    PB15
    Input
    Output
    Input, Output, or
    Disconnected
    GPIO
    Disconnected
    Host Acknowledge
    —When HDI08 is programmed to interface a single host
    request host bus and the HI function is selected, this signal is the host
    acknowledge (HACK) Schmitt-trigger input. The polarity of the host
    acknowledge is programmable, but is configured as active-low (HACK) after
    reset.
    Receive Host Request
    —When HDI08 is programmed to interface a double
    host request host bus and the HI function is selected, this signal is the receive
    host request (HRRQ) output. The polarity of the host request is
    programmable, but is configured as active-low (HRRQ) after reset. The host
    request may be programmed as a driven or open-drain output.
    Port B 15
    —When the HDI08 is configured as GPIO, this signal is individually
    programmed as input, output, or internally disconnected.
    The default state after reset for this signal is GPIO disconnected.
    This input is 3.3V tolerant.
    Table 2-9 Host Interface (continued)
    Signal Name
    Type
    State During
    Reset
    Signal Description
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