參數(shù)資料
型號(hào)： DSP56367P
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類： 數(shù)字信號(hào)處理
英文描述： 24-Bit Audio Digital Signal Processor
中文描述： 24位音頻數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 13/100頁(yè)
文件大?。?/td> 1039K
代理商： DSP56367P
Parallel Host Interface (HDI08)
DSP56367 Technical Data, Rev. 2.1
Freescale Semiconductor
2-9
HA2
HA9
PB10
Input
Input
Input, Output, or
Disconnected
GPIO
Disconnected
Host Address Input 2
—When the HDI08 is programmed to interface a
non-multiplexed host bus and the HI function is selected, this signal is line 2
of the host address (HA2) input bus.
Host Address 9
—When HDI08 is programmed to interface a multiplexed host
bus and the HI function is selected, this signal is line 9 of the host address
(HA9) input bus.
Port B 10
—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
HRW
HRD/
HRD
PB11
Input
Input
Input, Output, or
Disconnected
GPIO
Disconnected
Host Read/Write
—When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this signal is the
Host Read/Write (HRW) input.
Host Read Data
—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this signal is the
host read data strobe (HRD) Schmitt-trigger input. The polarity of the data
strobe is programmable, but is configured as active-low (HRD) after reset.
Port B 11
—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
HDS/
HDS
HWR/
HWR
PB12
Input
Input
Input, Output, or
Disconnected
GPIO
Disconnected
Host Data Strobe—
When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this signal is the
host data strobe (HDS) Schmitt-trigger input. The polarity of the data strobe
is programmable, but is configured as active-low (HDS) following reset.
Host Write Data
—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this signal is the
host write data strobe (HWR) Schmitt-trigger input. The polarity of the data
strobe is programmable, but is configured as active-low (HWR) following
reset.
Port B 12
—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
Table 2-9 Host Interface (continued)
Signal Name
Type
State During
Reset
Signal Description
相關(guān)PDF資料
PDF描述
DSP56367UM 24-Bit Audio Digital Signal Processor
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56367UM 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor
DSP56371 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:high density CMOS device
DSP56371AF180 制造商:Freescale Semiconductor 功能描述:
DSP56371D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:high density CMOS device
DSP56371UM 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:DSP56371UM
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