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參數(shù)資料
| 型號： | DS2151Q |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | T1 Single-Chip Transceiver(T1單片收發(fā)器) |
| 中文描述： | DATACOM, FRAMER, PQCC44 |
| 封裝： | 0.652 INCH, PLASTIC, LCC-44 |
| 文件頁數(shù)： | 30/46頁 |
| 文件大?。?/td> | 307K |
| 代理商： | DS2151Q |
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DS2151Q
022698 30/46
TRANSFORMER SPECIFICATIONS
Table 12–3
SPECIFICATION
RECOMMENDED VALUE
Turns Ratio
1:1 (receive) and 1:1.15 or 1:1.36 (transmit)
±
5%
Primary Inductance
600
μ
H minimum
Leakage Inductance
1.0
μ
H maximum
Intertwining Capacitance
40 pF maximum
DC Resistance
1.2 ohms maximum
12.3 JITTER ATTENUATOR
The DS2151Q contains an onboard jitter attenuator that
can be set to a depth of either 32 or 128 bits via the
JABDS bit in the Line Interface Control Register (LICR).
The 128–bit mode is used in applications where large
excursions of wander are expected. The 32–bit mode is
used in delay sensitive applications. The characteris-
tics of the attenuation are shown in Figure 12–4. The jit-
ter attenuator can be placed in either the receive path or
t he transmit path by appropriately setting or clearing the
JAS bit in the LICR. Also, the jitter attenuator can be dis-
abled (in effect, removed) by setting the DJA–bit in the
LICR. In order for the jitter attenuator to operate prop-
erly, a crystal with the specifications listed in Table 12–4
below must be connected to the XTAL1 and XTAL2 pins.
The jitter attenuator divides the clock provided by the
6.176 MHz crystal at the XTAL1 and XTAL2 pins to
create an output clock that contains very little jitter.
Onboard circuitry will pull the crystal (by switching in or
out load capacitance) to keep it long term averaged to
the same frequency as the incoming T1 signal. If the
incoming jitter exceeds either 120UIpp (buffer depth is
128 bits) or 28 UIpp (buffer depth is 32 bits), then the
DS2151Q will divide the attached crystal by either 3.5 or
4.5 instead of the normal 4 to keep the buffer from over-
flowing. When the device divides by either 3.5 or 4.5, it
also sets the Jitter Attenuator Limit Trip (JALT) bit in the
Receive Information Register 2 (RIR2.2).
CRYSTAL SELECTION GUIDELINES
Table 12–4
PARAMETER
SPECIFICATION
Parallel Resonant Frequency
6.176 MHz
Mode
Fundamental
Load Capacitance
18 pF to 20 pF (18.5 pF nominal)
Tolerance
±
50 ppm
Pullability
CL=10 pF, delta frequency=+175 to +250 ppm
CL=45 pF, delta frequency=–175 to –250 ppm
Effective Series Resistance
40 ohms maximum
Crystal Cut
AT
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2151Q/T&R | 制造商:Maxim Integrated Products 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC |
| DS2151Q/T&R | 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS2151QB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2151QB/T&R | 制造商:Maxim Integrated Products 功能描述:T1 SINGLE CHIP XCVR REV B T&R - Tape and Reel |
| DS2151QB/T&R+ | 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel |
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