參數(shù)資料
型號(hào): DS2151Q
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 數(shù)字傳輸電路
英文描述: T1 Single-Chip Transceiver(T1單片收發(fā)器)
中文描述: DATACOM, FRAMER, PQCC44
封裝: 0.652 INCH, PLASTIC, LCC-44
文件頁數(shù): 16/46頁
文件大小: 307K
代理商: DS2151Q
DS2151Q
022698 16/46
SR1: STATUS REGISTER 1
(Address=20 Hex)
(MSB)
(LSB)
LUP
LDN
LOTC
RSLIP
RBL
RYEL
RCL
RLOS
SYMBOL
POSITION
NAME AND DESCRIPTION
LUP
SR1.7
Loop Up Code Detected
. Set when the repeating ...00001... loop up code
is being received.
LDN
SR1.6
Loop Down Code Detected
. Set when the repeating ...001... loop down
code is being received.
LOTC
SR1.5
Loss of Transmit Clock
. Set when the TCLK pin has not transitioned for
one channel time (or 5.2us). Will force pin 16 high if enabled via CCR1.6.
Based on RCLK.
RSLIP
SR1.4
Receive Elastic Store Slip Occurrence
. Set when the receive elastic
store has either repeated or deleted a frame.
RBL
SR1.3
Receive Blue Alarm
. Set when a blue alarm is received at RTIP and
RRING. See note below.
RYEL
SR1.2
Receive Yellow Alarm
. Set when a yellow alarm is received at RTIP and
RRING.
RCL
SR1.1
Receive Carrier Loss
. Set when 192 consecutive zeros have been
detected at RTIP and RRING.
RLOS
SR1.0
Receive Loss of Sync
. Set when the device is not synchronized to the
receive T1 stream.
DS2151Q ALARM SET AND CLEAR CRITERIA
Table 4–2
ALARM
SET CRITERIA
CLEAR CRITERIA
Blue Alarm
(AIS) (see note 1
below)
when over a 3 ms window, five or
less zeros are received
when over a 3 ms window, six or
more zeros are received
Yellow Alarm
1.
D4 bit 2 mode (RCR2.2=0)
when bit 2 of 256 consecutive
channels is set to zero for at least
254 occurrences
when bit 2 of 256 consecutive
channels is set to zero for less
than 254 occurrences
2.
D4 12th F–bit mode
(RCR2.2=1; this mode is also
referred to as the “Japanese
Yellow Alarm”)
when the 12th framing bit is set to
one for two consecutive occur-
rences
when the 12th framing bit is set to
zero for two consecutive occur-
rences
3.
ESF Mode
when 16 consecutive patterns of
00FF hex appear in the FDL
when 14 or less patterns of 00FF
hex out of 16 possible appear in
the FDL
Red Alarm
(RCL) (this alarm is
also referred to as Loss of Signal)
when 192 consecutive zeros are
received
when 14 or more ones out of 112
possible bit positions are received
starting with the first one received
NOTE:
1. The definition of Blue Alarm (or Alarm Indication Signal) is an unframed all ones signal. Blue alarm detectors
should be able to operate properly in the presence of a 10–3 error rate and they should not falsely trigger on a
framed all ones signal. The blue alarm criteria in the DS2151Q has been set to achieve this performance. It is
recommended that the RBL bit be qualified with the RLOS status bit in detecting a blue alarm.
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