參數(shù)資料
型號： DS2151Q
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 數(shù)字傳輸電路
英文描述： T1 Single-Chip Transceiver(T1單片收發(fā)器)
中文描述： DATACOM, FRAMER, PQCC44
封裝： 0.652 INCH, PLASTIC, LCC-44
文件頁數(shù)： 11/46頁
文件大小： 307K
代理商： DS2151Q
DS2151Q
022698 11/46
CCR1: COMMON CONTROL REGISTER 1
(Address=37 Hex)
(MSB)
(LSB)
TESE
LLB
RSAO
RLB
SCLKM
RESE
PLB
FLB
SYMBOL
POSITION
NAME AND DESCRIPTION
TESE
CCR1.7
Transmit Elastic Store Enable
.
0=elastic store is bypassed
1=elastic store is enabled
LLB
CCR1.6
Local Loopback
.
0=loopback disabled
1=loopback enabled
RSAO
CCR1.5
Receive Signaling All One’s
.
0=allow robbed signaling bits to appear at RSER
1=force all robbed signaling bits at RSER to one
RLB
CCR1.4
Remote Loopback
.
0=loopback disabled
1=loopback enabled
SCLKM
CCR1.3
SYSCLK Mode Select
.
0=if SYSCLK is 1.544 MHz
1=if SYSCLK is 2.048 MHz
RESE
CCR1.2
Receive Elastic Store Enable
.
0=elastic store is bypassed
1=elastic store is enabled
PLB
CCR1.1
Payload Loopback
.
0=loopback disabled
1=loopback enabled
FLB
CCR1.0
Framer Loopback
.
0=loopback disabled
1=loopback enabled
LOCAL LOOPBACK
When CCR1.6 is set to a one, the DS2151Q will be
forced into Local LoopBack (LLB). In this loopback,
data will continue to be transmitted as normal through
the transmit side of the SCT. Data being received at
RTIP and RRING will be replaced with the data being
transmitted. Data in this loopback will pass through the
jitter attenuator and the jitter attenuator should be pro-
grammed to be in the transmit path. LLB is primarily
used in debug and test applications. Please see the
DS2151Q Block Diagram in Section 1 for more details.
REMOTE LOOPBACK
When CCR1.4 is set to a one, the DS2151Q will be
forced into Remote LoopBack (RLB). In this loopback,
data recovered off the T1 line from the RTIP and RRING
pins will be transmitted back onto the T1 line (with any
BPVs that might have occurred intact) via the TTIP and
TRING pins. Data will continue to pass through the
receive side of the DS2151Q as it would normally and
the data at the TSER input will be ignored. Data in this
loopback will pass through the jitter attenuator. RLB is
used to place the DS2151Q into “l(fā)ine” loopback which is
a requirement of both ANSI T1.403 and AT&T TR62411.
Please see the DS2151Q Block Diagram in Section 1 for
more details.
PAYLOAD LOOPBACK
When CCR1.1 is set to a one, the DS2151Q will be
forced into Payload LoopBack (PLB). Normally, this
loopback is only enabled when ESF framing is being
performed. In a PLB situation, the DS2151Q will loop
the 192 bits of payload data (with BPVs corrected) from
the receive section back to the transmit section. The
FPS framing pattern, CRC6 calculation, and the FDL
bits are not looped back, they are reinserted by the
相關(guān)PDF資料
PDF描述
DS2154 Enhanced E1 Single Chip Transceiver(改進(jìn)型E1單片收發(fā)器)
DS2164Q G.726 ADPCM Processor(G.726自適應(yīng)音頻脈沖編碼處理器)
DS2175 T1/CEPT Elastic Store(T1/CEPT 彈性存儲器)
DS2180A T1 Transceiver(T1收發(fā)器)
DS2187 Receive Line Interface(接收線接口)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2151Q/T&R 制造商:Maxim Integrated Products 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC
DS2151Q/T&R 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:*
DS2151QB 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2151QB/T&R 制造商:Maxim Integrated Products 功能描述:T1 SINGLE CHIP XCVR REV B T&R - Tape and Reel
DS2151QB/T&R+ 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*