- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385273 > DS2151Q (MAXIM INTEGRATED PRODUCTS INC) T1 Single-Chip Transceiver(T1單片收發(fā)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | DS2151Q |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | T1 Single-Chip Transceiver(T1單片收發(fā)器) |
| 中文描述： | DATACOM, FRAMER, PQCC44 |
| 封裝： | 0.652 INCH, PLASTIC, LCC-44 |
| 文件頁數(shù)： | 21/46頁 |
| 文件大?。?/td> | 307K |
| 代理商： | DS2151Q |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當(dāng)前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
DS2151Q
022698 21/46
NOTES:
1. The lower nibble of the counter at address 25 is used by the Path Code Violation Count Register.
2. MOSCR counts either errors in framing bit position (RCR2.0=0) or the number of multiframes out of sync
(RCR2.0=1).
MULTIFRAMES OUT OF SYNC COUNTING ARRANGEMENTS
Table 5–3
COUNT MOS OR
F–BIT ERRORS
(RCR2.0)
FRAMING MODE
(CCR2.3)
D4
WHAT IS COUNTED IN THE MOSCRs
number of multiframes out of sync
MOS
D4
F–Bit
errors in the Ft pattern
ESF
MOS
number of multiframes out of sync
ESF
F–Bit
errors in the FPS pattern
6.0 FDL/FS EXTRACTION AND INSERTION
The DS2151Q has the ability to extract/insert data from/
into the Facility Data Link (FDL) in the ESF framing
mode and from/into Fs bit position in the D4 framing
mode. Since SLC–96 utilizes the Fs bit position, this
capability can also be used in SLC–96 applications.
The operation of the receive and transmit sections will
be discussed separately.
6.1 Receive Section
In the receive section, the recovered FDL bits or Fs bits
are shifted bit–by–bit into the Receive FDL register
(RFDL). Since the RFDL is 8 bits in length, it will fill up
every 2 ms (8 times 250 us). The DS2151Q will signal
an external microcontroller that the buffer has filled via
the SR2.4 bit. If enabled via IMR2.4, the INT2 pin will
toggle low indicating that the buffer has filled and needs
to be read. The user has 2 ms to read this data before it
is lost. If the byte in the RFDL matches either of the
bytes programmed into the RFDLM1 or RFDLM2 regis-
ters, then the SR2.2 bit will be set to a one and the INT2
pin will be toggled low if enabled via IMR2.2. This fea-
ture allows an external microcontroller to ignore the FDL
or Fs pattern until an important event occurs.
The DS2151Q also contains a zero destuffer which is
controlled via the CCR2.0 bit. In both ANSI T1.403 and
TR54016, communications on the FDL follows a subset
of a LAPD protocol. The LAPD protocol states that no
more than 5 ones should be transmitted in a row so that
the data does not resemble an opening or closing flag
(01111110) or an abort signal (11111111). If enabled via
CCR2.0, the DS2151Q will automatically look for 5 ones
in a row, followed by a zero. If it finds such a pattern, it
will automatically remove the zero. If the zero destuffer
sees six or more ones in a row followed by a zero, the
zero is not removed. The CCR2.0 bit should always be
set to a one when the DS2151Q is extracting the FDL.
More on how to use the DS2151Q in FDL and SLC–96
applications is covered in a separate Application Note.
Also, contact the factory for C code software that
implements both ANSI T1.403 and AT&T TR54016.
RFDL: RECEIVE FDL REGISTER
(Address=28 Hex)
(MSB)
(LSB)
RFDL7
RFDL6
RFDL5
RFDL4
RFDL3
RFDL2
RFDL1
RFDL0
SYMBOL
POSITION
NAME AND DESCRIPTION
RFDL7
RFDL.7
MSB of the Received FDL Code
RFDL0
RFDL.0
LSB of the Received FDL Code
The Receive FDL Register (RFDL) reports the incoming
Facility Data Link (FDL) or the incoming Fs bits. The
LSB is received first.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2154 | Enhanced E1 Single Chip Transceiver(改進(jìn)型E1單片收發(fā)器) |
| DS2164Q | G.726 ADPCM Processor(G.726自適應(yīng)音頻脈沖編碼處理器) |
| DS2175 | T1/CEPT Elastic Store(T1/CEPT 彈性存儲(chǔ)器) |
| DS2180A | T1 Transceiver(T1收發(fā)器) |
| DS2187 | Receive Line Interface(接收線接口) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2151Q/T&R | 制造商:Maxim Integrated Products 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC |
| DS2151Q/T&R | 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS2151QB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2151QB/T&R | 制造商:Maxim Integrated Products 功能描述:T1 SINGLE CHIP XCVR REV B T&R - Tape and Reel |
| DS2151QB/T&R+ | 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。