參數(shù)資料
型號(hào)： C9837AT
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 時(shí)鐘產(chǎn)生/分配
英文描述： PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝： TSSOP-48
文件頁(yè)數(shù)： 6/20頁(yè)
文件大?。?/td> 316K
代理商： C9837AT
+/+
…when timing is critical
C9837
Low EMI Clock Generator for Intel
Mobile 133MHz/2 SO-DIMM Chipset Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.,
Rev 1.0
3/30/2000
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
Page 14 of 20
http://www.imicorp.com
AC Parameters
133MHz Host
100MHz Host
66MHz Host
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Units
TPeriod
CPU(0,1) period
5,6
7.5
8.0
10.0
10.5
15.0
15.5
ns
THIGH
CPU(0,1) high time
10
1.87
-
3.0
-
5.2
-
ns
TLOW
CPU(0,1) low time
11
1.67
-
2.8
-
5.0
-
ns
Tr / Tf
CPU(0,1) rise and fall times
7
0.4
1.6
0.4
1.6
0.4
1.6
ns
TSKEW
Any CPU to any CPU Skew
6,9
-
150
-
150
-
150
ps
TCCJ
CPU(0,1) Cycle to Cycle Jitter
6,9
-
250
-
250
-
250
ps
TPeriod
SDRAM(0:3) 100MHz and DCLK period
5,6
10.0
10.5
10.0
10.5
10.0
10.5
ns
THIGH
SDRAM(0:3) 100MHz and DCLK high time
10
3.0
-
3.0
-
3.0
-
ns
TLOW
SDRAM(0:3) 100MHz and DCLK low time
11
2.8
-
2.8
-
2.8
-
ns
Tr / Tf
SDRAM(0:3) 100MHz and DCLK rise and
fall times
7
0.4
1.6
0.4
1.6
0.4
1.6
ns
TSKEW
SDRAM(0:3) 100MHz and DCLK Skew
6,9
-
250
-
250
-
250
ps
TCCJ
SDRAM(0:3) 100MHz, DCLK Cycle to Cycle
Jitter
6,9
-
250
-
250
-
250
ps
TPeriod
IOAPIC(0,1) period
5,6
30.0
-
30.0
-
30.0
-
ns
THIGH
IOAPIC(0,1) high time
10
12.0
-
12.0
-
12.0
-
ns
TLOW
IOAPIC(0,1) low time
11
12.0
-
12.0
-
12.0
-
ns
Tr / Tf
IOAPIC(0,1) rise and fall times
7
0.4
1.6
0.4
1.6
0.4
1.6
ns
TSKEW
IOAPIC(0,1) Skew
6,9
-
250
-
250
-
250
ps
TCCJ
IOAPIC(0,1) Cycle to Cycle Jitter
6,9
-
500
-
500
-
500
ps
TPeriod
3V66-(0:2) period
5,6
15.0
16.0
15.0
16.0
15.0
16.0
ns
THIGH
3V66-(0:2) high time
10
5.25
-
5.25
-
5.25
-
ns
TLOW
3V66-(0:2) low time
11
5.05
-
5.05
-
5.05
-
ns
Tr / Tf
3V66-(0:2) rise and fall times
7
0.5
2.0
0.5
2.0
0.5
2.0
ns
TSKEW
(Any 3V66) to (any 3V66) Skew
6,9
-
175
-
175
-
175
ps
TCCJ
3V66-(0:2) Cycle to Cycle Jitter
6,9
-
500
-
500
-
500
ps
TPeriod
PCI(_F,1:6) period
5,6
30.0
-
30.0
-
30.0
-
ns
THIGH
PCI(_F, 1:6) high time
10
12.0
-
12.0
-
12.0
-
ns
TLOW
PCI(_F, 1:6) low time
11
12.0
-
12.0
-
12.0
-
ns
Tr / Tf
PCI(_F, 1:6) rise and fall times
7
0.5
2.0
0.5
2.0
0.5
2.0
ns
TSKEW
(Any PCI) to (Any PCI) Skew
6,9
-
500
-
500
-
500
ps
TCCJ
PCI(_F, 1:6) Cycle to Cycle Jitter
6,9
-
500
-
500
-
500
ps
TPeriod
DOT & USB (48M[0,1])
period (conforms to +167ppm max)
5,6
20.8299
20.8333
20.8299
20.8333
20.829
20.833
ns
Tr / Tf
DOT & USB rise and fall times
7
1.0
4.0
1.0
4.0
1.0
4.0
ns
TCCJ
DOT & USB Cycle to Cycle Jitter
6,9
-
500
-
500
-
500
ps
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