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參數(shù)資料
| 型號： | C9837AT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | TSSOP-48 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 316K |
| 代理商： | C9837AT |
+/+
…when timing is critical
C9837
Low EMI Clock Generator for Intel
Mobile 133MHz/2 SO-DIMM Chipset Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.,
Rev 1.0
3/30/2000
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
Page 11 of 20
http://www.imicorp.com
I
2C Test Circuitry
Figure 6
Note: Buffer is 7407 with VCC @ 5.0V
Spread Spectrum Clock Generation (SSCG)
Spread Spectrum is a modulation technique applied here for maximum efficiency in minimizing Electro-Magnetic
Interference radiation generated by repetitive digital signals, mainly clocks. A clock accumulates EM energy at the
center frequency it is generating. Spread Spectrum distributes this energy over a small frequency bandwidth therefore
distributing an even amount of energy over a wider spectrum. This technique is achieved by modulating the clock either
down (Figure 7a) or around the center (Figure 7b) of its resting frequency by a certain percentage (which also
determines the energy distribution bandwidth). In this device, Spread Spectrum is enabled by setting I
2C Byte0, bit3 = 1.
The default of the device at power up keeps the Spread Spectrum disabled, it is therefore, important to have I
2C
accessibility to turn-on the Spread Spectrum function. Once the Spread Spectrum is enabled, the spread bandwidth
option is selected by SST(0:2) in I
2C Byte 5, bits 5, 6 & 7 following tables 5a, and 5b below.
In Down Spread mode the center frequency is shifted down from its rested (non-spread) value by of the total spread
%. (e.g.: assuming the center frequency is 100MHz in non-spread mode; when down spread of –0.5% is enabled, the
center frequency shifts to 99.75MHz.).
2.2 K
Device under Test
SDATA
DATAIN
SCLK
DATAOUT
CLOCK
+ 5V
2.2 K
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