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參數(shù)資料
| 型號(hào)： | C9837AT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | TSSOP-48 |
| 文件頁數(shù)： | 17/20頁 |
| 文件大小： | 316K |
| 代理商： | C9837AT |
+/+
…when timing is critical
C9837
Low EMI Clock Generator for Intel
Mobile 133MHz/2 SO-DIMM Chipset Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.,
Rev 1.0
3/30/2000
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
Page 6 of 20
http://www.imicorp.com
PCI_STP# Timing
PCI_STP# is an input to the clock generator and is made synchronous to the clock driver PCI_F output. It is used to turn
off the PCI clocks for low power operation. PCI clocks are stopped in a low state and started such that a full high pulse
width is guaranteed. ONLY one rising edge of PCI_F occurs after the clock control logic switched for the PCI outputs to
become enabled/disabled.
PCI_STP# Timing Diagram
PCI_STP#
PCI_F
(High)
PCI(1:6)
CPU_STP#
PD#
Tsu
Figure 3
Notes:
1.
All internal timing is referenced to the CPU clock.
2.
PCI_STP# signal is an input signal which must be made synchronous to PCI_F output.
3.
All other clocks continue to run undisturbed.
4.
PD# is understood to be in a high state.
5.
Diagrams shown with respect to 133MHz. Similar operation when CPU is 100MHz.
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