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參數(shù)資料
| 型號： | C9837AT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | TSSOP-48 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 316K |
| 代理商： | C9837AT |
+/+
…when timing is critical
C9837
Low EMI Clock Generator for Intel
Mobile 133MHz/2 SO-DIMM Chipset Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.,
Rev 1.0
3/30/2000
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
Page 13 of 20
http://www.imicorp.com
Maximum Ratings
Maximum Input Voltage Relative to VSS:
VSS - 0.3V
Maximum Input Voltage Relative to VDD: VDD + 0.3V
Storage Temperature:
-65
°C to + 150°C
Operating Temperature:
0
°C to +70°C
Maximum ESD Protection
2KV
Maximum Power Supply:
5.5V
This device contains circuitry that protects the inputs
against damage due to high static voltages or electric
field; however, precautions should be taken to avoid
application of any voltage higher than the maximum
rated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either VSS or VDD).
DC Parameters (All outputs loaded per Table 6 below)
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Input Low Voltage
VIL1
-
1.0
V
Input High Voltage
VIH1
2.0
-
V
Note 1
Input Low Voltage
VIL2
-
1.0
V
Input High Voltage
VIH2
2.2
-
V
Note 2
Input Low Current (@VIL = VSS)
IIL1
-5
A
Input High Current (@VIH =VDD)
IIH1
5
A
For internal Pull up resistors,
Note 3
Tri-State leakage Current
Ioz
-
10
A
Dynamic Supply Current
Idd3.3V
-
160
mA
-
60
mA
CPU @ 66MHz
75
mA
CPU @ 100MHz
Dynamic Supply Current
Idd2.5V
-
90
mA
CPU @ 133MHz
Power Down Supply Current
Ipd3.3V
1
mA
PD# = ‘0’
Power Down Supply Current
Ipd2.5V
1
mA
PD# = ‘0’
Input pin capacitance
Cin
-
5
pF
Output pin capacitance
Cout
-
6
pF
Pin inductance
Lpin
-
7
nH
Crystal pin capacitance
Cxtal
34
36
38
pF
Measured from Pin to Ground. Note 4
Crystal DC Bias Voltage
VBIAS
0.3Vdd
Vdd/2
0.7Vdd
V
Crystal Startup time
Txs
-
40
s
From Stable 3.3V power supply.
VDD = VDDS = VDDP = AVDD = 3.3V
±5%, VDDC = VDDI = 2.5V ± 5%, TA = 0°C to +70°C
Note 1:
Applicable to input signals: SEL(0,1), PD# (pull up), PCI_STP#, CPU_STP#
Note 2:
Applicable to SDATA, and SCLK.
Note 3:
Internal Pull up and Pull down resistors have a typical value of 350k (200K and 500K).
Note 4:
See applications data that is presented later in this data sheet on crystal interfacing.
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