參數(shù)資料
型號(hào)： AMDOPTERON
英文描述： AMD Opteron - AMD Opteron Processor Data Sheet
中文描述： AMD Opteron處理器- AMD Opteron處理器的數(shù)據(jù)資料
文件頁(yè)數(shù)： 77/81頁(yè)
文件大?。?/td> 1189K
代理商： AMDOPTERON
Chapter 7
Electrical Data
77
23932 Rev 3.00 April 2003
AMD Opteron
Processor Data Sheet
6. The VDD to VLDT relationship allows for VDD to power-up before VLDT and specifically allows for
VDD=VDD_max with VLDT=0 V. VDD must power-up before VLDT to help ensure that PWROK is properly passed
from the pins into the VDD power domain such that the deasserted state can be seen in the VLDT power domain.
7.5.2.2
Sequencing Relationships: Signals to Power Supplies (Stress Conditions)
Once the powerup sequence has been completed and PWROK can be asserted, the sequencing of
input signals to the CPU and output signals from the CPU can begin. The requirements from signals
to power supplies are summarized by type as follows.
VDDIO inputs and outputs are allowed to exceed VDDIO by 0.3V and are allowed to be 0.3V
below VSS.
VDDIO inputs are allowed to exceed VTT by VTT_dc Max + 0.3V and are allowed to be 0.3V
below VSS.
VLDT inputs and outputs are allowed to exceed VLDT by 0.3V and are allowed to be 0.3V below
VSS.
7.5.2.3
Power Failures
The power sequencing relationships defined in sections 7.5.2.1 and 7.5.2.2 must be guaranteed by the
motherboard power supply subsystem in the event of a power failure.
7.5.2.4
Unused Links
Because the AMD Opteron processor has three independent HyperTransport links, some
implementations will not connect one or more of these links. In this case, the VLDT of the link that is
not connected to another device, should be connected to the VLDT of an operating link. Note that
even if the link is not used, the VLDT for the link must be connected so that the internal link detection
circuitry can successfully determine the connection status of the link.
7.5.2.5
Power States
During system power state S3, the RUN supplies (VLDT, VDD, and VDDA) to the CPU are to be
turned off. During this operating mode, all internal leakage paths between SUS supplies (VDDIO and
VTT) and these powered off planes are disabled. During S0 and S1, all RUN and SUS planes are to
be powered on. During S4 and S5, all supplies to the CPU are to be turned off.
相關(guān)PDF資料
PDF描述
AMH461 AMH461
AMIS-30622 I2C Microstepping Motordriver
AMIS-30660 High Speed CAN Transceiver
AMIS-39100 Octal High Side Driver with Protection
AMIS39100AGA Octal High Side Driver with Protection
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AMDTP-4 功能描述:電線(xiàn)導(dǎo)管 2 Channel Alumn Pole 2 Duplex Receptacles RoHS:否 制造商:Panduit 類(lèi)型:Slotted SideWall Open finger design wiring cut 材料:Polypropylene 顏色:Light Gray 大小: 最大光束直徑: 抗拉強(qiáng)度: 外部導(dǎo)管寬度:25 mm 外部導(dǎo)管高度:25 mm
AMDTP-412 功能描述:電線(xiàn)導(dǎo)管 2 Channel Alumn Pole 3 Duplex Receptacles RoHS:否 制造商:Panduit 類(lèi)型:Slotted SideWall Open finger design wiring cut 材料:Polypropylene 顏色:Light Gray 大小: 最大光束直徑: 抗拉強(qiáng)度: 外部導(dǎo)管寬度:25 mm 外部導(dǎo)管高度:25 mm
AMDTP-415 功能描述:電線(xiàn)導(dǎo)管 2 Channel Alumn Pole 4 Duplex Receptacles RoHS:否 制造商:Panduit 類(lèi)型:Slotted SideWall Open finger design wiring cut 材料:Polypropylene 顏色:Light Gray 大小: 最大光束直徑: 抗拉強(qiáng)度: 外部導(dǎo)管寬度:25 mm 外部導(dǎo)管高度:25 mm
AMDTP-4CG 功能描述:電線(xiàn)導(dǎo)管 Two Ch. Alumnm Pole 2 Duplx Recept Surge RoHS:否 制造商:Panduit 類(lèi)型:Slotted SideWall Open finger design wiring cut 材料:Polypropylene 顏色:Light Gray 大小: 最大光束直徑: 抗拉強(qiáng)度: 外部導(dǎo)管寬度:25 mm 外部導(dǎo)管高度:25 mm
AMDTP-4D 制造商:Wiremold / Legrand 功能描述:TPP ALUM DED/ISOL GRD 10FT.
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*