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參數(shù)資料
| 型號： | AMDOPTERON |
| 英文描述： | AMD Opteron - AMD Opteron Processor Data Sheet |
| 中文描述： | AMD Opteron處理器- AMD Opteron處理器的數(shù)據(jù)資料 |
| 文件頁數(shù)： | 57/81頁 |
| 文件大?。?/td> | 1189K |
| 代理商： | AMDOPTERON |
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Chapter 7
Electrical Data
57
23932 Rev 3.00 April 2003
AMD Opteron
Processor Data Sheet
1. V
ref
is expected to be equal to 0.5*V
DDIO
and to track variations in the DC level of the same. Peak to peak noise on
V
ref
may not exceed + 2% of the DC value.
2. The AC values indicate the voltage levels at which the receiver must meet its timing specifications. The DC values
indicate the voltage levels at which the final logic state of the receiver is unambiguously defined. The receiver
effectively switches to the new logic state when receiver input crosses the AC level. The new logic state is maintained
as long as the input stays beyond the DC threshold.
3. With compensation the granularity between NMOS current and PMOS current cannot exceed 3mA. The range is 6mA
due to 10% variation.
4. V
OD
is the differential output voltage or the voltage difference between true and complement under DC or AC
conditions.
5.
V
OD
is the change in magnitude between the differential output voltage while driving a logic 0 and while driving a
logic 1.
6. V
OCM
is the output common mode voltage defined as the average of the true voltage magnitude and the complement
voltage magnitude relative to ground under DC or AC conditions.
7.
V
OCM
is the change in magnitude between the output common mode voltage while driving a logic 0 and while
driving a logic 1.
8.
C means the difference in capacitance between any MEMDATA/MEMDQS pin to any other MEMDATA/MEMDQS
pin.
9. Pullup and pulldown slew rate is measured into R
TT
(50 Ohms) to V
TT
as shown in Figure 4. The slew rate is measured
between V
ref
+ 300 mV. It is designed for any pattern of data, including all outputs switching and only one output
switching.
10.The ratio of pullup slew rate to pulldown slew rate is specified for the same temperature and voltage, over the entire
temperature and voltage range. For a given output, it represents the maximum difference between pullup and
pulldown drivers due to process variation.
11. The slew rate is measured at the CPU pin between V
ref
+ 150 mV. Minimum and maximum input slew rate
specification is set based on DRAM output slew rate specification.
12.VDDIO_dc is defined in Table 32 on page 74.
Figure 4. Slew Rate Measurement Example
R
TT
V
TT
0 pF
Driver
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