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參數(shù)資料
| 型號(hào)： | AM79C974KCW |
| 廠(chǎng)商： | ADVANCED MICRO DEVICES INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| 中文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132 |
| 封裝： | PLASTIC, QFP-132 |
| 文件頁(yè)數(shù)： | 73/153頁(yè) |
| 文件大?。?/td> | 838K |
| 代理商： | AM79C974KCW |
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P R E L I M I N A R Y
AMD
73
Am79C974
There are restrictions on loopback operation. The
Am79C974 controller has only one FCS generator cir-
cuit. The FCS generator can be used by the transmitter
to generate the FCS to append to the frame, or it can be
used by the receiver to verify the FCS of the received
frame. It can not be used by the receiver and transmitter
simultaneously.
If the FCS generator is connected to the receiver, the
transmitter will not append an FCS to the frame, but the
receiver will check for one. The user can, however, cal-
culate the FCS value for a frame and include this four-
byte number in the transmit buffer.
If the FCS generator is connected to the transmitter, the
transmitter will append an FCS to the frame, but the re-
ceiver will not check for the FCS. However, the user can
verify the FCS by software.
During loopback, the FCS logic can be allocated to the
receiver by setting DXMTFCS = 1 in CSR15.
If DXMTFCS=0, the MAC Engine will calculate and ap-
pend the FCS to the transmitted message. The receive
message passed to the host will therefore contain an ad-
ditional 4 bytes of FCS. In this loopback configuration,
the receive circuitry cannot detect FCS errors if
theyoccur.
If DXMTFCS=1, the last four bytes of the transmit mes-
sage must contain the (software generated) FCS com-
puted for the transmit data preceding it. The MAC
Engine will transmit the data without addition of an FCS
field, and the FCS will be calculated and verified at
thereceiver.
The loopback facilities of the MAC Engine allow full op-
eration to be verified without disturbance to the network.
Loopback operation is also affected by the state of the
Loopback Control bits (LOOP, MENDECL, and INTL) in
CSR15. This affects whether the internal MENDEC is
considered
part
of
the
loopbackpath.
internal
or
external
The multicast address detection logic uses the FCS
generator circuit. Therefore, in the loopback mode(s),
the multicast address detection feature of the MAC En-
gine, programmed by the contents of the Logical Ad-
dress Filter (LADRF [63:0] in CSRs 8–11) can only be
tested when DXMTFCS=1, allocating the FCS genera-
tor to the receiver. All other features operate identically
in loopback as in normal operation, such as automatic
transmit padding and receive pad stripping.
When performing an internal loopback, no frame will be
transmitted to the network. However, when the
Am79C974 controller is configured for internal loopback
the receiver will not be able to detect network traffic. Ex-
ternal loopback tests will transmit frames onto the
network if the AUI port is selected, and the Am79C974
controller will receive network traffic while configured for
external loopback when the AUI port is selected. Runt
Packet Accept is automatically enabled when any loop-
back mode is invoked.
Loopback mode can be performed with any frame size.
Runt Packet Accept is internally enabled (RPA bit in
CSR124 is not affected) when any loopback mode is in-
voked. This is to be backwards compatible to the
LANCE (Am7990) software.
When the 10BASE-T MAU is selected in external loop-
back mode, the collision detection is disabled. This is
necessary, because a collision in a 10BASE-T system is
defined as activity on the transmitter outputs and re-
ceiver inputs at the same time, which is exactly what oc-
curs during external loopback.
Since a 10BASE-T hub does not normally feed the sta-
tion’s transmitter outputs back into the station’s receiver
inputs, the use of external loopback in a 10BASE-T sys-
tem usually requires some sort of external hardware that
connects the outputs of the 10BASE-T MAU to
itsinputs.
LED Support
The Am79C974 controller can support up to 3 LEDs.
LED outputs
LNKST
and
LED1
allow for direct connec-
tion of an LED and its supporting pullup device. LED out-
put
LED3
may require an additional buffer between the
Am79C974 controller output pin and the LED and its
supporting pullup device.
Because the
LED3
output is multiplexed with other
Am79C974 controller functions, it may not always be
possible to connect an LED circuit directly to the
LED3
pin. For example, when an LED circuit is directly con-
nected to the EEDO/
LED3
pin, then it is not possible for
most serial EEPROM devices to sink enough I
OL
to
maintain a valid low level on the EEDO input to the
Am79C974 controller. Therefore, in applications that re-
quire both an EEPROM and a third LED, then it is neces-
sary
to
buffer
the
LED3
EEPROM-PCnet-SCSI connection. The LED registers
in the BCR resource space allow each LED output to be
programmed for either active high or active low opera-
tion, so that both inverting and non-inverting buffering
choices are possible.
circuit
from
the
In applications where an EEPROM is not needed, the
LED3
pin may be directly connected to an LED circuit.
The Am79C974
LED3
pin driver will be able to sink
enough current to properly drive the LED circuit.
By default, after H_RESET, the 3 LED outputs are con-
figured in the following manner:
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| AM79C973KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C975 | 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C975BKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKD\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKD\W | 制造商:Advanced Micro Devices 功能描述:PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY 制造商:AMD (Advanced Micro Devices) 功能描述:PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
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