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參數(shù)資料
| 型號： | AM79C974KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| 中文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132 |
| 封裝： | PLASTIC, QFP-132 |
| 文件頁數(shù)： | 137/153頁 |
| 文件大?。?/td> | 838K |
| 代理商： | AM79C974KCW |
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AMD
A M E N D M E N T
3
Am79C974
Page 44
Change SPRINTEN to
LAPPEN
in lines 12 and 13.
Page 54
Line 17, change 100% to
10%
.
Page 59
Line 12 should read, “When the Am79C974 controller samples its IDSELA or IDSELB input ...” (The original ommitted
“IDSELA”).
Page 62
Column 2, line 30, change “l(fā)ower two bytes” to “
upper two bytes
”.
Page 71
Line 15, change “DRCBC” to “
DRCVPA
”.
Page 76
(Reprinted as pages 13 and 14 of the amendment)
“DMA BLAST command” section has been extensively revised.
Page 77
(Reprinted as page 15 of this amendment)
The description of the CMD1–0 bits at the end of column 2 should read, “These two bits are encoded to represent four
commands: IDLE, BLAST, START, and ABORT.” (The BLAST command was omitted in the original.)
In the table at the bottom, the description of the IDLE command should read, “Resets the DMA block to the IDLE state.
Stops any current transfer. Does not affect status bits or cause an interrupt.”
Pages 78–80
(Reprinted as pages 16–18 of this amendment)
“DMA Scatter-Gather Operation (4K aligned elements)” section has been extensively revised.
Page 81
Delete lines 19 and 20, which read, “The DMA transfer request was aborted (ABORT command, or the Master or
Target Abort).”
Page 92
ABSOLUTE MAXIMUM RATINGS
Line 4: Add “or V
SSBS
or DV
SS
” to read “Supply Voltage to AV
SS
or V
SSB
or V
SSBS
or DV
SS
”
Line 5: Add “V
DDBS
, DV
DD
” to read “(AV
DD
, V
DD
, V
DDB
, V
DDBS
, DV
DD
)”
Page 92
OPERATING RANGES
Line 3: Add “V
DDBS
, DV
DD
” to read “(AV
DD
, V
DD
, V
DDB
, V
DDBS
, DV
DD
)”
After Line 7: Add “or V
SSBS
–0.5 V
≤
V
IN
≤
V
DDBS
+0.5 V” and “or DV
SS
–0.5 V
≤
V
IN
≤
DV
DD
+0.5 V”
In the DC Characteristics table, V
OL
(max) for those pins to which I
OL1
or I
OL2
applies is 0.55 V (to comply with the PCI
specification) rather than 0.45 V. Also, V
OL
(max) for those pins to which I
OL3
applies is 0.4 V rather than 0.45 V.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C975 | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973 | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C975KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973VCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C975 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C975BKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKD\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKD\W | 制造商:Advanced Micro Devices 功能描述:PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY 制造商:AMD (Advanced Micro Devices) 功能描述:PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
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