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參數(shù)資料
| 型號： | AM79C974KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| 中文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132 |
| 封裝： | PLASTIC, QFP-132 |
| 文件頁數(shù)： | 152/153頁 |
| 文件大?。?/td> | 838K |
| 代理商： | AM79C974KCW |
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AMD
A M E N D M E N T
18
Am79C974
When WAC (bits 11:0) again reaches the next 4K byte
boundary, the next MDL entry is read into the WAC. The
operation continues in this way until WMAC register
reaches the last MDL entry (Page Frame Address #n in
this example).
4. The WAC register points to the beginning of the last
page#n and the DMA operation continues until the
byte count is exhausted in the Working Byte
Counter (WBC) register. When WBC=0, the chip
stops incrementing the WAC register. This is
shown below.
18681A/1-34
0
12
31
WAC
4K Page #n
Page Frame Address #n
From the MDL
WBC = 0
0
Data
DMA Scatter-Gather Operation
(Non-4k aligned elements MDL not set)
There is another way to implement a scatter-gather op-
eration which does not force the data elements to be
aligned on 4k boundaries. It assumes a “traditional”
scatter-gather list of the following format:
Element 0
Physical Address Byte Count
Element 1
Physical Address Byte Count
...
Element n
Physical Address Byte Count
This second implementation is described as follows:
1. Set the SCSI Start Transfer Count Register
((B)+00h, (B)+04h, (B)+38h) to the Byte count of
the first Scatter-Gather element.
2. Program the DMA Starting Transfer Count Regis-
ter ((B)+44h) to the Byte Count of the first Scatter-
Gather element.
3. Program the DMA Starting Physical Address Reg-
ister ((B)+48h) to the Physical Address of the first
Scatter-Gather element.
4. Start the SCSI operation by issuing a SCSI Infor-
mation Transfer command.
5. Start the DMA Engine with DMA Transfer Interrupt
Enable (Bit 6, (B)+40h).
6. When the Scatter-Gather element’s Byte Count
is exhausted, the DMA engine will generate an
interrupt.
7. Reprogram the next Scatter-Gather element’s Byte
Count into the SCSI Start Transfer Count Register
and the DMA Starting Transfer Count Register.
8. Reprogram the DMA Starting Physical Address
Register ((B)+48h) to the Physical Address of the
next Scatter-Gather element.
9. Repeat steps 4–8 until the Scatter-Gather list is
completed.
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PDF描述 |
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| AM79C975 | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973 | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C975KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973VCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C975 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C975BKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKD\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C975BKD\W | 制造商:Advanced Micro Devices 功能描述:PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY 制造商:AMD (Advanced Micro Devices) 功能描述:PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
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