Typical is given for VS = V
參數(shù)資料
型號(hào)： AD9520-5BCPZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 34/76頁(yè)
文件大小： 0K
描述： IC CLOCK GEN EXT VCO 64LFCSP
設(shè)計(jì)資源： Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121)
Phase Coherent FSK Modulator (CN0186)
標(biāo)準(zhǔn)包裝： 750
類型： 時(shí)鐘發(fā)生器，扇出配送
PLL： 是
輸入： CMOS，LVDS，LVPECL
輸出： CMOS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 2:12，2:24
差分 - 輸入:輸出： 是/是
頻率 - 最大： 2.4GHz
除法器/乘法器： 是/無
電源電壓： 3.135 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
AD9520-5
Data Sheet
Rev. A | Page 4 of 76
SPECIFICATIONS
Typical is given for VS = VS_DRV = 3.3 V ± 5%; VS ≤ VCP ≤ 5.25 V; TA = 25°C; RSET = 4.12 k; CPRSET = 5.1 k, unless otherwise noted. Minimum
and maximum values are given over full VS and TA (40°C to +85°C) variation.
POWER SUPPLY REQUIREMENTS
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER PINS
VS
3.135
3.3
3.465
V
3.3 V ± 5%
VS_DRV
2.375
VS
V
Nominally 2.5 V to 3.3 V ± 5%
VCP
VS
5.25
V
Nominally 3.3 V to 5.0 V ± 5%
CURRENT SET RESISTORS
RSET Pin Resistor
4.12
kΩ
Sets internal biasing currents; connect to ground
CPRSET Pin Resistor
5.1
kΩ
Sets internal CP current range, nominally 4.8 mA
(CP_lsb = 600 A); actual current can be calculated
by CP_lsb = 3.06/CPRSET; connect to ground
PLL CHARACTERISTICS
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
REFERENCE INPUTS
Differential Mode (REFIN, REFIN)
Differential mode (can accommodate single-ended
input by ac grounding undriven input)
Input Frequency
0
250
MHz
Frequencies below about 1 MHz should be dc-
coupled; be careful to match VCM (self-bias voltage)
Input Sensitivity
280
mV p-
p
PLL figure of merit (FOM) increases with increasing
slew rate (see Figure 11); the input sensitivity is
sufficient for ac-coupled LVDS and LVPECL signals
Self-Bias Voltage, REFIN
1.35
1.60
1.75
V
Self-bias voltage of REFIN1
Self-Bias Voltage, REFIN
1.30
1.50
1.60
V
Self-bias voltage of REFIN1
Input Resistance, REFIN
4.0
4.8
5.9
kΩ
Self-biased1
Input Resistance, REFIN
4.4
5.3
6.4
kΩ
Self-biased1
Dual Single-Ended Mode (REF1, REF2)
Two single-ended CMOS-compatible inputs
Input Frequency (AC-Coupled with
DC Offset Off)
10
250
MHz
Slew rate must be >50 V/s
Input Frequency (AC-Coupled with
DC Offset On)
250
MHz
Slew rate must be >50 V/s, and input amplitude
sensitivity specification must be met; see the input
sensitivity parameter
Input Frequency (DC-Coupled)
0
250
MHz
Slew rate > 50 V/s; CMOS levels
Input Sensitivity (AC-Coupled
with DC Offset Off)
0.55
3.28
V p-p
VIH should not exceed VS
Input Sensitivity (AC-Coupled with
DC Offset On)
1.5
2.78
V p-p
VIH should not exceed VS
Input Logic High, DC Offset Off
2.0
V
Input Logic Low, DC Offset Off
0.8
V
Input Current
100
+100
A
Input Capacitance
2
pF
Each pin, REFIN (REF1)/REFIN (REF2)
Pulse Width High/Low
1.8
ns
The amount of time that a square wave is high/low;
determines the allowable input duty cycle
Crystal Oscillator
Crystal Resonator Frequency Range
16.62
33.33
MHz
Maximum Crystal Motional Resistance
30
Ω
相關(guān)PDF資料
PDF描述
AD9522-0BCPZ-REEL7 IC CLOCK GEN 2.8GHZ VCO 64LFCSP
AD9522-1BCPZ-REEL7 IC CLOCK GEN 2.5GHZ VCO 64LFCSP
AD9522-2BCPZ IC CLOCK GEN 2.2GHZ VCO 64LFCSP
AD9522-3BCPZ-REEL7 IC CLOCK GEN 2GHZ VCO 64LFCSP
AD9522-4BCPZ-REEL7 IC CLOCK GEN 1.6GHZ VCO 64LFCSP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9521JH 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Log/Antilog Amplifier
AD9521KH 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Log/Antilog Amplifier
AD9521SE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Log/Antilog Amplifier
AD9521SH 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Log/Antilog Amplifier
AD9521TE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Log/Antilog Amplifier
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*