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參數(shù)資料
| 型號： | AD7294BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/49頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT I2C/SRL 1M 56LFCSP |
| 標準包裝： | 1 |
| 類型： | ADC，DAC |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 22.22k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.4 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 供應商設(shè)備封裝： | 56-LFCSP-VQ（8x8） |
| 包裝： | 托盤 |
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Data Sheet
AD7294
Rev. H | Page 13 of 48
TQFP Pin No.
LFCSP Pin No.
Mnemonic
Description
40
35
SCL
Serial I2C Bus Clock. The data transfer rate in I2C mode is compatible with both
100 kHz and 400 kHz operating modes. Open-drain input; external pull-up
resistor required.
41
36
OPGND
Dedicated Ground Pin for I2C Interface.
42
37
V
DRIVE
Logic Power Supply. The voltage supplied at this pin determines at what
voltage the interface operates. Decouple this pin to DGND. The voltage range
on this pin is 2.7 V to 5.5 V and may be different to the voltage level at AV
DD
and DV
DD, but should never exceed either by more than 0.3 V. To set the input
and output thresholds, connect this pin to the supply to which the I2C bus is
pulled.
43, 47, 48
38, 42
DGND
Digital Ground. This pin is the ground for all digital circuitry.
44
39
DV
DD
Logic Power Supply. The operating range is 4.5 V to 5.5 V. These pins provide
the supply voltage for all the digital circuitry on the AD7294. Connect the AV
DD
and DV
DD pins together to ensure that all supply pins are at the same potential.
Decouple this supply to DGND with a10 F tantalum capacitor and a 0.1 F
ceramic capacitor.
46, 45
41, 40
I
SENSE1
OVERRANGE,
I
SENSE2
OVERRANGE
Fault Comparator Outputs. These pins connect to the high-side current sense
amplifiers.
49, 50, 51, 52
43, 44, 45, 46
V
IN3 to VIN0
Uncommitted ADC Analog Inputs. These pins are programmable as four
single-ended channels or two true differential analog input channel pairs. See
Table 1 and Table 13 for more details.
53
47
REF
OUT/REFIN ADC
ADC Reference Input/Output Pin. The REF
OUT/REFIN ADC pin provides the
reference source for the ADC. Upon power-up, the default configuration of this
pin is external reference (REF
IN). Enable the internal reference by writing to the
power-down register; see Table 27. Connect decoupling capacitors (220 nF
recommended) to this pin to decouple the reference buffer. Provided the
output is buffered, the on-chip reference can be taken from this pin and
applied externally to the rest of a system. A maximum external reference
voltage of 2.5 V can be supplied to the REF
OUT portion of the REFOUT/REFIN
ADC pin.
54
48
DCAP
External Decoupling Capacitor Input for Internal Temperature Sensor.
Decouple this pin to AGND using a 0.1 μF capacitor. In normal operation, the
voltage is typically 3.7 V.
62, 63
55, 56
V
PP1, VPP2
Current Sensor Supply Pins. Power supply pins for the high-side current sense
amplifiers. Operating range is from AV
DD to 59.4 V. Decouple this supply to
AGND. See the Current Sense Filtering section.
EP
Exposed Pad
The exposed pad is located on the underside of the package. Connect the
exposed pad to the ground plane of the PCB using multiple vias.
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