參數(shù)資料
型號(hào): AD7294BCPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 40/49頁(yè)
文件大小: 0K
描述: IC ADC 12BIT I2C/SRL 1M 56LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: ADC,DAC
分辨率(位): 12 b
采樣率(每秒): 22.22k
數(shù)據(jù)接口: I²C,串行
電壓電源: 模擬和數(shù)字
電源電壓: 4.4 V ~ 5.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 56-LFCSP-VQ(8x8)
包裝: 托盤
AD7294
Data Sheet
Rev. H | Page 44 of 48
GAIN CONTROL OF POWER AMPLIFIER
In gain control mode, a setpoint voltage, proportional in dB to
the desired output power, is applied to a power detector such as
the AD8362. A sample of the output power from the power
amplifier (PA), through a directional coupler and attenuator (or
by other means), is fed to the input of the AD8362. The VOUT
is connected to the gain control terminal of the PA, see Figure 60.
Based on the defined relationship between VOUT and the RF
input signal, the AD8362 adjusts the voltage on VOUT (VOUT
is now an error amplifier output) until the level at the RF input
corresponds to the applied VSET. The AD7294 completes a
feedback loop that tracks the output of the AD8362 and adjusts
the VSET input of the AD8362 accordingly.
VOUT of the AD8362 is applied to the gain control terminal of
the power amplifier. For this output power control loop to be
stable, a ground referenced capacitor must be connected to the
CLPF pin. This capacitor integrates the error signal (which is
actually a current) that is present when the loop is not balanced.
In a system where a variable gain amplifier (VGA) or variable
voltage attenuator (VVA) feeds the power amp, only one AD8362
is required. In such a case, the gain on one of the parts (VVA,
PA) is fixed and VOUT feeds the control input of the other.
C5
1nF
C7
0.1nF
C6
0.1nF
1:4
T2
AD8362
AD7294
CLPF
ENVELOPE OF
TRANSMITTED
SIGNAL
DIRECTIONAL
COUPLER
ATTENUATOR
POWER
AMPLIFIER
RF IN
VIN
VOUT
VOUT
VSET
INLO
INHI
05747-
037
Figure 60. Setpoint Controller Operation
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