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參數(shù)資料
| 型號： | AD7294BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 29/49頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT I2C/SRL 1M 56LFCSP |
| 標準包裝： | 1 |
| 類型： | ADC，DAC |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 22.22k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.4 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 供應商設(shè)備封裝： | 56-LFCSP-VQ（8x8） |
| 包裝： | 托盤 |
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AD7294
Data Sheet
Rev. H | Page 34 of 48
I2C INTERFACE
GENERAL I2C TIMING
Figure 50 shows the timing diagram for general read and write
operations using an I2C-compliant interface.
The I2C bus uses open-drain drivers; therefore, when no device
is driving the bus, both SCL and SDA are high. This is known as
idle state. When the bus is idle, the master initiates a data transfer
by establishing a start condition, defined as a high-to-low
transition on the serial data line (SDA) while the serial clock line
(SCL) remains high. This indicates that a data stream follows. The
master device is responsible for generating the clock.
Data is sent over the serial bus in groups of nine bits—eight bits
of data from the transmitter followed by an acknowledge bit (ACK)
from the receiver. Data transitions on the SDA line must occur
during the low period of the clock signal and remain stable
during the high period. The receiver should pull the SDA line
low during the acknowledge bit to signal that the preceding byte
has been received correctly. If this is not the case, cancel the
transaction.
The first byte that the master sends must consist of a 7-bit slave
address, followed by a data direction bit. Each device on the bus
has a unique slave address; therefore, the first byte sets up
communication with a single slave device for the duration of the
transaction.
The transaction can be used either to write to a slave device
(data direction bit = 0) or to read data from it (data direction
bit = 1). In the case of a read transaction, it is often necessary
first to write to the slave device (in a separate write transaction)
to tell it from which register to read. Reading and writing
cannot be combined in one transaction.
When the transaction is complete, the master can keep control
of the bus, initiating a new transaction by generating another
start bit (high-to-low transition on SDA while SCL is high). This
is known as a repeated start (Sr). Alternatively, the bus can be
relinquished by releasing the SCL line followed by the SDA line.
This low-to-high transition on SDA while SCL is high is known
as a stop bit (P), and it leaves the I2C bus in its idle state (no
current is consumed by the bus).
The example in Figure 50 shows a simple write transaction
with an AD7294 as the slave device. In this example, the
AD7294 register pointer is being set up ready for a future read
transaction.
P7
P6
P5
P4
P3
P2
P1
P0
START COND
BY MASTER
ACK. BY
AD7294
SLAVE ADDRESS BYTE
ACK. BY
AD7294
SCL
SDA
REGISTER ADDRESS
STOP BY
MASTER
USER PROGRAMMABLE 5 LSBs
R/W
A6
A5
A4
A3
A2
A1
A0
05747-
040
Figure 50. General I2C Timing
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| AD7294BCPZRL | 功能描述:IC ADC 12BIT I2C/SRL 1M 56LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7294BSUZ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12B Monitor & Cntrl System w/ Temp Sensr RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風格: 封裝 / 箱體: |
| AD7294BSUZRL | 制造商:Analog Devices 功能描述:Temp Sensor Digital Serial (2-Wire, I2C) 64-Pin TQFP 制造商:Analog Devices 功能描述:TEMP SENSOR DGTL SERL (2-WIRE, I2C) 64TQFP - Tape and Reel 制造商:Analog Devices 功能描述:IC ADC 12BIT W/DAC/TEMP 64TQFP 制造商:Analog Devices Inc. 功能描述:Analog to Digital Converters - ADC 12-Bit Multi-Channel ADC DAC wt Temp IC 制造商:Analog Devices 功能描述:CONVERTER - ADC |
| AD7298 | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Channel, 1MSPS, 12-Bit SAR ADC with Temperature Sensor |
| AD7298-1BCPZ | 功能描述:IC ADC 10BIT SPI/SRL 8CH 20LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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