參數(shù)資料
型號: 28F160C18
廠商: Intel Corp.
英文描述: 1.8V Advanced+ Boot Block Flash Memory(1.8V高級引導(dǎo)塊閃速存儲器)
中文描述: 1.8高級啟動塊閃存(1.8V的高級引導(dǎo)塊閃速存儲器)
文件頁數(shù): 32/52頁
文件大?。?/td> 272K
代理商: 28F160C18
28F160C18
E
32
ADVANCE INFORMATION
4.6
AC Characteristics
—Write Operations
(1,5,6)
—Extended Temperature
Product
16 Mbit
Access Time (ns)
90
120
#
Symbol
t
PHWL
/
t
PHEL
t
ELWL
/
t
WLEL
t
WLWH
/
t
ELEH
t
DVWH
/
t
DVEH
t
AVWH
/
t
AVEH
t
WHEH
/
t
EHWH
t
WHDX
/
t
EHDX
t
WHAX
/
t
EHAX
t
WHWL
/
t
EHEL
t
VPWH
/
t
VPEH
Parameter
Note
Min
Min
Unit
W1
RST# High Recovery to WE# (CE#) Going Low
150
150
ns
W2
CE# (WE#) Setup to WE# (CE#) Going Low
0
0
ns
W3
WE# (CE#) Pulse Width
4
70
70
ns
W4
Data Setup to WE# (CE#) Going High
2
70
70
ns
W5
Address Setup to WE# (CE#) Going High
2
70
70
ns
W6
CE# (WE#) Hold Time from WE# (CE#) High
0
0
ns
W7
Data Hold Time from WE# (CE#) High
2
0
0
ns
W8
Address Hold Time from WE# (CE#) High
2
0
0
ns
W9
WE# (CE#) Pulse Width High
4
30
30
Ns
W10
V
PP
Setup to WE# (CE#) Going High
3
200
200
ns
W11
t
QVVL
V
PP
Hold from Valid SRD
3
0
0
ns
W12
t
BHWH
/
t
BHEH
WP# Setup to WE# (CE#) Going High
3
0
0
ns
W13
t
QVBL
WP#
Hold from Valid SRD
3
0
0
ns
W14
t
WHGL
Write Recovery before Read
3,7
30
ns
NOTES:
1.
2.
3.
4.
Write timing characteristics during erase suspend are the same as during write-only operations.
Refer to Table 5 for valid A
IN
or D
IN
.
Sampled, but not 100% tested.
Write pulse width (t
) is defined from CE# or WE# going low (whichever goes low last)
to CE# or WE# going high
(whichever goes high first). Hence, t
= t
= t
= t
= t
. Similarly, Write pulse width high (t
) is defined
from CE# or WE# going high (whichever goes high first)
to CE# or WE# going low (whichever goes low first). Hence,
t
WPH
= t
WHWL
= t
EHEL
= t
WHEL
= t
EHWL
.
See Figure 5: Input/Output Reference Waveformfor timing measurements and maximum allowable input slew rate.
See Figure 8: AC Waveform: Program and Erase Operations
Delay is defined from WE#(CE#) high to OE# going low.
5.
6.
7.
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