參數(shù)資料
型號： 1893YI-10
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： DATACOM, INTERFACE CIRCUIT, PQFP64
封裝： 10 X 10 MM, TQFP-64
文件頁數(shù)： 98/152頁
文件大小： 943K
代理商： 1893YI-10
Table of Contents
ICS1893 Rev C 6/6/00
June, 2000
5
ICS1893 - Release
Copyright 2000, Integrated Circuit Systems, Inc.
All rights reserved.
Table of Contents
Section
Title
Page
8.5
Register 3: PHY Identifier Register ........................................................................ 74
8.5.1
OUI bits 19-24 (bits 3.15:10) .................................................................................. 74
8.5.2
Manufacturer's Model Number (bits 3.9:4) ............................................................. 75
8.5.3
Revision Number (bits 3.3:0) ................................................................................. 75
8.6
Register 4: Auto-Negotiation Register ................................................................... 76
8.6.1
Next Page (bit 4.15) ............................................................................................... 76
8.6.2
IEEE Reserved Bit (bit 4.14) .................................................................................. 77
8.6.3
Remote Fault (bit 4.13) .......................................................................................... 77
8.6.4
IEEE Reserved Bits (bits 4.12:10) ......................................................................... 77
8.6.5
Technology Ability Field (bits 4.9:5) ....................................................................... 78
8.6.6
Selector Field (Bits 4.4:0) ....................................................................................... 79
8.7
Register 5: Auto-Negotiation Link Partner Ability Register .................................... 80
8.7.1
Next Page (bit 5.15) ............................................................................................... 80
8.7.2
Acknowledge (bit 5.14) .......................................................................................... 81
8.7.3
Remote Fault (bit 5.13) .......................................................................................... 81
8.7.4
Technology Ability Field (bits 5.12:5) ..................................................................... 81
8.7.5
Selector Field (bits 5.4:0) ....................................................................................... 81
8.8
Register 6: Auto-Negotiation Expansion Register .................................................. 82
8.8.1
IEEE Reserved Bits (bits 6.15:5) ........................................................................... 82
8.8.2
Parallel Detection Fault (bit 6.4) ............................................................................. 83
8.8.3
Link Partner Next Page Able (bit 6.3) .................................................................... 83
8.8.4
Next Page Able (bit 6.2) ......................................................................................... 83
8.8.5
Page Received (bit 6.1) ......................................................................................... 83
8.8.6
Link Partner Auto-Negotiation Able (bit 6.0) .......................................................... 83
8.9
Register 7: Auto-Negotiation Next Page Transmit Register ................................... 84
8.9.1
Next Page (bit 7.15) ............................................................................................... 85
8.9.2
IEEE Reserved Bit (bit 7.14) .................................................................................. 85
8.9.3
Message Page (bit 7.13) ........................................................................................ 85
8.9.4
Acknowledge 2 (bit 7.12) ....................................................................................... 85
8.9.5
Toggle (bit 7.11) ..................................................................................................... 85
8.9.6
Message Code Field / Unformatted Code Field (bits 7.10:0) ................................. 85
8.10
Register 8: Auto-Negotiation Next Page Link Partner Ability Register ................... 86
8.10.1
Next Page (bit 8.15) ............................................................................................... 87
8.10.2
IEEE Reserved Bit (bit 8.14) .................................................................................. 87
8.10.3
Message Page (bit 8.13) ........................................................................................ 87
8.10.4
Acknowledge 2 (bit 8.12) ....................................................................................... 87
8.10.5
Message Code Field / Unformatted Code Field (bits 8.10:0) ................................. 87
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參數(shù)描述
1893YI-10LF 功能描述:以太網(wǎng) IC 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
1893YI-10LFT 功能描述:以太網(wǎng) IC 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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1894# 制造商:Fluke Electronics 功能描述:BNC (F)/BANANA PLUG 制造商:Pomona Electronics 功能描述:
1894 制造商:Pomona Electronics 功能描述:ADAPTER BNC FEMALE-BANANA PLUG 制造商:Pomona Electronics 功能描述:ADAPTER, BNC FEMALE-BANANA PLUG
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