參數(shù)資料
型號： 1893YI-10
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： DATACOM, INTERFACE CIRCUIT, PQFP64
封裝： 10 X 10 MM, TQFP-64
文件頁數(shù)： 107/152頁
文件大?。?/td> 943K
代理商： 1893YI-10
ICS1893 Rev C 6/6/00
June, 2000
58
Chapter 7
Functional Blocks
ICS1893 Data Sheet - Release
Copyright 2000, Integrated Circuit Systems, Inc.
All rights reserved.
7.6.2.7
Management Frame Turnaround
A valid management frame includes a turn-around field (TA), which is a 2-bit time space between the
REGAD field and the Data field. This time allows an ICS1893 and an STA to avoid contentions during read
transactions. During an operation that is a:
Read, an ICS1893 remains in the high-impedance state during the first bit time and subsequently drives
its MDIO pin to logic zero for the second bit time.
Write, an ICS1893 waits while the STA transmits a logic one, followed by a logic zero on its MDIO pin.
7.6.2.8
Management Frame Data
A valid management frame includes a 16-bit Data field for exchanging the register contents between the
ICS1893 and the STA. All Management Registers are 16 bits wide, matching the width of the Data field.
During a transaction that is a:
Read, (OP is 10b) the ICS1893 obtains the contents of the register identified in the REGAD field and
returns this Data to the STA synchronously with its MDC signal.
Write, (OP is 01b) the ICS1893 stores the value of the Data field in the register identified in the REGAD
field.
If the STA attempts to:
Read from a non-existent ICS1893 register, the ICS1893 returns logic one for all bits in the Data field,
FFFFh.
Write to a non-existent ICS1893 register, the ICS1893 isolates the Data field of the management frame
from every reaching the registers.
Note:
The first Data bit transmitted and received is the most-significant bit of a Management Register, bit
X.15.
7.6.2.9
Serial Management Interface Idle State
The MDIO signal is in an idle state during the time between STA transactions. When the Serial
Management Interface is in the idle state, the ICS1893 disables (that is, tri-states) its MDIO pin, which
enters a high-impedance state. The ISO/IEC 8802-3 standard requires that an MDIO signal be idle for at
least one bit time between management transactions. However, the ICS1893 does not have this limitation
and can support a continual bit stream on its MDIO signals.
相關(guān)PDF資料
PDF描述
1894-40KLF DATACOM, INTERFACE CIRCUIT, QCC40
1894-40KLFT DATACOM, INTERFACE CIRCUIT, QCC40
1895230000 15 A, STRIP TERMINAL BLOCK, 2 ROWS, 2 DECKS
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18F-08P-244 8 CONTACT(S), CABLE MOUNT, MINI DIN CONNECTOR, PLUG
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