- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄293745 > 1893YI-10 (INTEGRATED DEVICE TECHNOLOGY INC) DATACOM, INTERFACE CIRCUIT, PQFP64 PDF資料下載
參數(shù)資料
| 型號： | 1893YI-10 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 網(wǎng)絡接口 |
| 英文描述： | DATACOM, INTERFACE CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, TQFP-64 |
| 文件頁數(shù)： | 1/152頁 |
| 文件大小： | 943K |
| 代理商： | 1893YI-10 |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁
ICS1893 Rev D 8/11/09
June, 2000
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any information
being relied upon by the customer is current and accurate.
Integrated Circuit Systems, Inc.
3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893
Document Type:
Data Sheet
Document Stage: Release
Features
Supports category 5 cables with attenuation in excess of
24 dB at 100 MHz across a temperature range from -5
°to
+85
°C
DSP-based baseline wander correction to virtually
eliminate killer packets across temperature range of from
-5
°to +85°C
Low-power, 0.35-micron CMOS (typically 400 mW)
Single 3.3-V power supply.
Single-chip, fully integrated PHY provides PCS, PMA,
PMD, and AUTONEG sublayers of IEEE standard
10Base-T and 100Base-TX IEEE 802.3 compliant
Fully integrated, DSP-based PMD includes:
– Adaptive equalization and baseline wander correction
– Transmit wave shaping and stream cipher scrambler
– MLT-3 encoder and NRZ/NRZI encoder
Highly configurable design supports:
– Node, repeater, and switch applications
– Managed and unmanaged applications
– 10M or 100M half- and full-duplex modes
– Parallel detection
– Auto-negotiation, with Next Page capabilities
MAC/Repeater Interface can be configured as:
– 10M or 100M Media Independent Interface
– 100M Symbol Interface (bypasses the PCS)
– 10M 7-wire Serial Interface
Small Footprint 64-pin Thin Quad Flat Pack (TQFP)
General
The ICS1893 is a low-power, physical-layer device (PHY)
that supports the ISO/IEC 10Base-T and 100Base-TX
Carrier-Sense Multiple Access/Collision Detection
(CSMA/CD) Ethernet standards. The ICS1893 architecture
is based on the ICS1892. The ICS1893 supports managed
or unmanaged node, repeater, and switch applications.
The ICS1893 incorporates digital signal processing (DSP) in
its Physical Medium Dependent (PMD) sublayer. As a result,
it can transmit and receive data on unshielded twisted-pair
(UTP) category 5 cables with attenuation in excess of 24 dB
at 100 MHz. With this ICS-patented technology, the
ICS1893 can virtually eliminate errors from killer packets.
The ICS1893 provides a Serial Management Interface for
exchanging command and status information with a Station
Management (STA) entity.
The ICS1893 Media Dependent Interface (MDI) can be
configured to provide either half- or full-duplex operation at
data rates of 10 MHz or 100 MHz. The MDI configuration
can be established manually (with input pins or control
register settings) or automatically (using th e
Auto-Negotiation features). When the ICS189 3
Auto-Negotiation sublayer is enabled, it exchanges
technology capability data with its remote link partner and
automatically selects the highest-performance operating
mode they have in common.
Clock
Power
LEDs and PHY
Address
Twisted-
Pair
Interface to
Magnetics
Modules and
RJ45
Connector
Integrated
Switch
MII
Extended
Register
Set
Interface
MUX
ICS1893 Block Diagram
PCS
Frame
CRS/COL
Detection
Parallel to Serial
4B/5B
Auto-
Negotiation
10Base-T
100Base-T
TP_PMD
MLT-3
Stream Cipher
Adaptive Equalizer
Baseline Wander
Correction
PMA
Clock Recovery
Link Monitor
Signal Detection
Error Detection
Low-Jitter
Clock
Synthesizer
Configuration
and Status
10/100 MII or
Alternate
MAC/Repeater
Interface
MII Serial
Management
Interface
NOTE: EOL for non-green parts to occur on
5/13/10 per PDN U-09-01.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 1894-40KLF | DATACOM, INTERFACE CIRCUIT, QCC40 |
| 1894-40KLFT | DATACOM, INTERFACE CIRCUIT, QCC40 |
| 1895230000 | 15 A, STRIP TERMINAL BLOCK, 2 ROWS, 2 DECKS |
| 18F-08P-241 | 8 CONTACT(S), CABLE MOUNT, MINI DIN CONNECTOR, PLUG |
| 18F-08P-244 | 8 CONTACT(S), CABLE MOUNT, MINI DIN CONNECTOR, PLUG |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 1893YI-10LF | 功能描述:以太網(wǎng) IC 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| 1893YI-10LFT | 功能描述:以太網(wǎng) IC 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| 1894 | 功能描述:支架與墊片 HEX .187X.625 ALUM RoHS:否 制造商:Schurter 類型:Transipillar Spacers 長度:16 m 螺紋大小:M4 外徑:10 mm 材料:Nylon with Steel 電鍍:Zinc |
| 1894# | 制造商:Fluke Electronics 功能描述:BNC (F)/BANANA PLUG 制造商:Pomona Electronics 功能描述: |
| 1894 | 制造商:Pomona Electronics 功能描述:ADAPTER BNC FEMALE-BANANA PLUG 制造商:Pomona Electronics 功能描述:ADAPTER, BNC FEMALE-BANANA PLUG |
發(fā)布緊急采購，3分鐘左右您將得到回復。