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| 型號(hào)： | 1893YI-10 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | DATACOM, INTERFACE CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, TQFP-64 |
| 文件頁(yè)數(shù)： | 103/152頁(yè) |
| 文件大?。?/td> | 943K |
| 代理商： | 1893YI-10 |
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ICS1893 Rev C 6/6/00
June, 2000
54
Chapter 7
Functional Blocks
ICS1893 Data Sheet - Release
Copyright 2000, Integrated Circuit Systems, Inc.
All rights reserved.
7.5.9
10Base-T Operation: Jabber
The ICS1893 has an ISO/IEC compliant Jabber Detection Function that, when enabled, monitors the data
stream sent to its Twisted-Pair Transmitter to ensure that it does not exceed the 10Base-T Jabber
activation time limit (that is, the maximum transmission time). For more information, see Section 10.5.20,
“10Base-T: Jabber Timing”.
When the Jabber Detection Function detects that its transmission time exceeds the maximum Jabber
activation time limit and Jabber Detection is enabled, the ICS1893 asserts its Collision Detect (COL) signal.
During this ISO/IEC specified ‘jabber de-activation time’, the ICS1893 transmit data stream is interrupted
and prevented from reaching its Twisted-Pair Transmitter. During this time, when interrupting the data
stream and asserting its COL signal, the ICS1893 transmits Normal Link Pulses and sets its QuickPoll
Detailed Status Register’s Jabber Detected bit (bit 17.2) to logic one. This bit is a latching high (LH) bit. (For
more information on latching high and latching low bits, see Section 8.1.4.1, “Latching High Bits”and
Section 8.1.4.2, “Latching Low Bits”.)
The ICS1893 provides an STA with the ability to disable the Jabber Detection Function using the Jabber
Inhibit bit (bit 18.5 in the 10Base-T Operations Register). Setting bit 18.5 to logic:
Zero (the default) enables the Jabber Detection Function.
One disables the Jabber Detection Function.
7.5.10
10Base-T Operation: SQE Test
The ICS1893 has an ISO/IEC compliant Signal Quality Error (SQE) Test Function used exclusively for
10Base-T operations. When enabled, the ICS1893 performs the SQE Test at the completion of each
transmitted packet (that is, whenever its TX_EN signal transitions from asserted to de-asserted). When the
ICS1893 executes its SQE Test, it asserts the COL signal to its MAC Interface for a pre-determined time
duration (ISO/IEC specified). [For more information, see Section 10.5.19, “10Base-T: Heartbeat Timing
(SQE)”.]
An ICS1893 SQE Test Function is:
Enabled only when all the following conditions are true:
– The ICS1893 is in node mode.
– The ICS1893 is in half-duplex mode.
– The ICS1893 has a valid link.
– The 10Base-T Operations Register’s SQE Test Inhibit bit (bit 18.2) is logic zero (the default).
– The ICS1893 TX_EN signal has transitioned from asserted (high) to de-asserted (low).
Disabled whenever any of the following are true:
– The ICS1893 is in Repeater mode.
– The ICS1893 is in full-duplex mode.
– The ICS1893 detects a link failure.
– The ICS1893 SQE Test Inhibit bit (bit 18.2) in the 10Base-T Operations Register is logic one. [This
bit provides the Station Management entity (STA) with the ability to disable the SQE Test function.]
Note:
1.
In 10Base-T mode, a bit time has a typical duration of 100 ns.
2.
The SQE Test also has the name 10Base-T Heartbeat. For details on the SQE waveforms, see Section
10.5.19, “10Base-T: Heartbeat Timing (SQE)”.
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