參數(shù)資料
型號(hào): ZL50408GDG2
廠商: CONEXANT SYSTEMS
元件分類: 網(wǎng)絡(luò)接口
英文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA208
封裝: 17 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-192, LBGA-208
文件頁(yè)數(shù): 28/144頁(yè)
文件大?。?/td> 1779K
代理商: ZL50408GDG2
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ZL50408
Data Sheet
123
Zarlink Semiconductor Inc.
Note
: There are two ways to reprogram the free granules.
1. CPU links all the granules: CPU writes memory directly, at last write head pointer (address EC1, EC2), tail
pointer (address EC3, EC4) and granule number (address EC5, EC6).
2. CPU tells Buffer Manager to link: CPU clear head pointer (address EC1, EC2), clear tail pointer (address EC3,
EC4), then write granule number that tells Buffer Manager to link (address EC5, EC6).
12.3.10.20
BM_RLSFF_CTRL
CPU address: h0EC7
Accessed by CPU (R/W)
The information of BM release FIFO is relocated to registers BM_RLSFF_INFO (address ECD, ECC, ECB, ECA,
EC9 and EC8). If the FIFO is not empty, CPU can read out the next by setting the bit 0. Read only happens when bit
0 is changing from 0 to 1.
12.3.10.21
BM_RSLFF_INFO[5:0]
CPU address: h0EC8
Accessed by CPU (RO)
CPU address: h0EC9
Accessed by CPU (RO)
CPU address: h0ECA
Accessed by CPU (RO)
CPU address: h0ECB
Accessed by CPU (RO)
Bit [0]
Read BM release FIFO.
Bits [7:1]
Reserved
Bits [7:0]
Rls_head_ptr[7:0].
Bits [6:0]
Rls_head_ptr[14:8].
Bit [7]
Rls_tail_ptr[0]
Bits [7:0]
Rls_tail_ptr[8:1]
Bits [5:0]
Rls_tail_ptr[14:9]
Bits [7:6]
Rls_count[1:0]
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