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參數(shù)資料
| 型號(hào)： | ZL50408GDG2 |
| 廠商： | CONEXANT SYSTEMS |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | DATACOM, LAN SWITCHING CIRCUIT, PBGA208 |
| 封裝： | 17 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-192, LBGA-208 |
| 文件頁(yè)數(shù)： | 127/144頁(yè) |
| 文件大小： | 1779K |
| 代理商： | ZL50408GDG2 |
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ZL50408
Data Sheet
83
Zarlink Semiconductor Inc.
12.3.2.6
PVMAPnn_0,1,3 – Ports 1~9 Configuration Registers
PVMAP01_0,1,3 -
IC Address h02B, 035, 03F; CPU Address:h0106, 0107, 0109 (Port 1)
PVMAP02_0,1,3
- IC Address h02C, 036, 040; CPU Address:h010A, 010B, 010D (Port 2)
PVMAP03_0,1,3
- IC Address h02D, 037, 041; CPU Address:h010E, 010F, 0111 (Port 3)
PVMAP04_0,1,3
- IC Address h02E, 038, 042; CPU Address:h0112, 0113, 0115 (Port 4)
PVMAP05_0,1,3
- IC Address h02F, 039, 043; CPU Address:h0116, 0117, 0119 (Port 5)
PVMAP06_0,1,3
- IC Address h030, 03A, 044; CPU Address:h011A, 011B, 011D (Port 6)
PVMAP07_0,1,3
- IC Address h031, 03B, 045; CPU Address:h011E, 011F, 0121 (Port 7)
PVMAP08_0,1,3
- IC Address h032, 03C, 046; CPU Address:h0122, 0123, 0125 (Port CPU)
PVMAP09_0,1,3
- IC Address h033, 03D, 047; CPU Address:h0126, 0127, 0129 (Port GMAC)
12.3.2.7
PVMODE
IC Address: h048, CPU Address: h0170
Accessed by CPU and IC (R/W)
Bit [2]:
Force untag out (VLAN tagging is based on IEEE 802.1Q rule).
0 - Disable (Default)
1 - Force untagged output. All packets transmitted from this port are untagged.
This bit is used when this port is connected to legacy equipment that does not
support VLAN tagging.
Bits [5:3]:
Default transmit priority. Used when Bit [7]=1 (Default 0)
Transmit Priority Level 0 (Lowest)
Transmit Priority Level 1
...
Transmit Priority Level 6
Transmit Priority Level 7 (Highest)
Bit [6]:
Default drop precedence. Used when Bit [7]=1
0 – Drop Precedence Level 0 (Lowest) (Default)
1 – Drop Precedence Level 1 (Highest)
Bit [7]:
Enable Fix Priority (Default 0)
0 - Disable. All frames are analysed. Transmit Priority and Drop Precedence are
based on VLAN Tag, TOS or Logical Port.
1 - Enable. Transmit Priority and Drop Precedence are based on values
programmed in bit [6:3]
Bit [0]:
VLAN Mode
0: Port based VLAN Mode (Default)
1: Tag based VLAN Mode
Bit [1]:
Slow learning (Default = 0)
Same function as SE_OPMODE bit [7]. Either bit can enable the function; both need to
be turned off to disable the feature.
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| ZL50409 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Managed 9-Port 10/100M Ethernet Switch |
| ZL50409GDC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Managed 9-Port 10/100M Ethernet Switch |
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