參數資料
型號： XRT72L71
廠商： Exar Corporation
元件分類： 通信及網絡
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數： 84/104頁
文件大小： 1156K
代理商： XRT72L71
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. P1.0.5
á
PRELIMINARY
84
T
ABLE
87:
R
X
CP I
DLE
C
ELL
M
ASK
H
EADER
B
YTE
-3
R
EGISTER
86 R
X
CP I
DLE
C
ELL
M
ASK
H
EADER
B
YTE
-3 H
EX
A
DDRESS
: 0
X
56
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Rx Idle Cell Mask 3
R/W
0xFF
This register, along with the “Rx Idle Cell Pattern - 3” Register permits the
user to define “Idle Cell Filtering” criteria for Header byte 3.
Any “1” in this register, configures the Receive Cell Processor to make the
comparison between the corresponding bit-field within Header byte 3 and
the contents of the “Rx Idle Cell Pattern - 3” register.
Any “0” in this register, configures the Receive Cell Processor to NOT per-
form this comparison:
This register should be set to “0xFF” when the Receive Cell Processor is
receiving the “ATM Forum” Standard Idle cells.
N
OTE
:
This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
88:
R
X
CP I
DLE
C
ELL
M
ASK
H
EADER
B
YTE
-4
R
EGISTER
87 R
X
CP I
DLE
C
ELL
M
ASK
H
EADER
B
YTE
-4 H
EX
A
DDRESS
: 0
X
57
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Rx Idle Cell Mask 4
R/W
0xFF
This register, along with the “Rx Idle Cell Pattern - 4” Register permits the
user to define “Idle Cell Filtering” criteria for Header byte 4.
Any “1” in this register, configures the Receive Cell Processor to make the
comparison between the corresponding bit-field within Header byte 4 and
the contents of the “Rx Idle Cell Pattern - 4” register.
Any “0” in this register, configures the Receive Cell Processor to NOT per-
form this comparison:
This register should be set to “0xFF” when the Receive Cell Processor is
receiving the “ATM Forum” Standard Idle cells.
N
OTE
:
This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
89:
R
X
CP U
SER
C
ELL
F
ILTER
P
ATTERN
H
EADER
B
YTE
-1
R
EGISTER
88 R
X
CP U
SER
C
ELL
F
ILTER
P
ATTERN
H
EADER
B
YTE
-1 H
EX
A
DDRESS
: 0
X
58
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
RxUser Cell Filter Pattern 1
R/W
0x00
This register (along with the “Rx User Cell Mask 1” register) permits the user
to specify the “User Cell Filtering” criteria for Header Byte 1.
N
OTE
:
This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
相關PDF資料
PDF描述
XRT72L73 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT72L74 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT7300IV E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT
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相關代理商/技術參數
參數描述
XRT72L71ES-00PCI 功能描述:網絡控制器與處理器 IC T73LC00A+T71D00 RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT72L71IQ 功能描述:網絡控制器與處理器 IC RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT72L71IQ-F 功能描述:網絡控制器與處理器 IC Single CH DS3 UNI (3.3V) RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT72L73IB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
XRT72L74IB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
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