參數(shù)資料
型號： XRT72L71
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 54/104頁
文件大?。?/td> 1156K
代理商： XRT72L71
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. P1.0.5
á
PRELIMINARY
54
T
ABLE
15:
R
X
DS3 C
ONFIGURATION
AND
S
TATUS
R
EGISTER
R
EGISTER
14 R
X
DS3 C
ONFIGURATION
AND
S
TATUS
R
EGISTER
H
EX
A
DDRESS
: 0
X
0E
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Rx AIS
RO
0
Receive AIS Alarm Indicator:
0: Indicates that the Receive DS3 Framer block is NOT detecting the “AIS”
(Alarm Indication Signal) pattern, within the inbound DS3 data stream.
1: Indicates that the Receive DS3 Framer block is currently detecting the
“AIS” pattern within the “inbound” DS3 data stream.
6
Rx LOS
RO
0
Receive LOS Alarm Indicator:
0: Indicates that the Receive DS3 Framer block is NOT currently declaring
an LOS (Loss of Signal) condition.
1: Indicates that the Receive DS3 Framer block is currently declaring an
LOS (Loss of Signal) condition.
5
Rx Idle
RO
0
Receive Idle Pattern Indicator:
0: Indicates that the Receive DS3 Framer block is NOT currently detecting
the “Idle” pattern, within the inbound DS3 data stream.
1: Indicates that the Receive DS3 Framer block is currently detecting the
“Idle” pattern within the inbound DS3 data stream.
4
Rx OOF
RO
1
Receive OOF (Out of Frame) Alarm Indicator:
0: Indicates that the Receive DS3 Framer block is NOT currently declaring
the “OOF (Out of Frame) condition.
1: Indicates that the Receive DS3 Framer block is currently declaring the
“OOF” (Out of Frame) condition.
3
Internal LOS Disable
R/W
0
0: On chip LOS detector is disabled. The XRT72L71 will only declare LOS
(Loss of Signal) is the “RLOS” input pin is pulled “high”.
1: On chip LOS detected is enabled. The XRT72L71 will declare and clear
LOS based upon the absence of a certain number of pulses in the incoming
DS3 data stream.
2
Framing On Parity
R/W
0
Framing On-Parity (In-Frame Declaration Criteria):
0: Receive DS3 Framer block declares the “Inframe” condition after “F-bit”
and “M-bit synchronization” have been achieved. P-bit checking is not a
part of “Frame Acquisition” process.
1: Receive DS3 Framer block declares the “Inframe” condition after “F-bit”
and “M-bit synchronization” process. Additionally, the Receive DS3 Framer
block must also detect valid (e.g., un-erred) P-bits.
1
Fsync Algo
R/W
0
0: OOF (Receive Out of Frame) condition is declared when 6 out of 16 con-
secutive F bits are in error
1: OOF (Receive Out of Frame) condition is declared when 3 out of 16 con-
secutive F bits are in error
0
Msync Algo
R/W
0
0: M-bit errors do not result in declaration of OOF
1: OOF is declared when M-bits in 3 out of 4 frames are in error.
相關(guān)PDF資料
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