參數(shù)資料
型號： XRT72L71
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 15/104頁
文件大小： 1156K
代理商： XRT72L71
á
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
PRELIMINARY
REV. P1.0.5
15
24
TxLev
O
Transmit Line Build Enable/Disable Select (to be connected to the TxLev
input pin of the XRT7300 E3/DS3/STS-1 LIU IC):
This output pin is intended
to be connected to the TxLev input pin of the XRT7300 E3/DS3/STS-1 LIU IC.
The user can control the state of this output pin by writing a “0” or a “1” to Bit 2
(TxLev) within the Line Interface Driver Register (Address = 0x72).
If the user commands this signal to toggle “High” then it will disable the “Trans-
mit Line Build-Out” circuitry within the XRT7300. In this case, the XRT7300
will output unshaped (square-wave) pulses onto the “Transmit Line Signal”. In
order to insure that the XRT7300 generates a line signal that is compliant with
the Bellcore GR-499-CORE Pulse Template requirements (at the DSX-3
Cross-Connect), the user is advised to set this output pin “High”, if the cable
length (between the Transmit Output of the XRT7300 and the DSX-3 Cross-
Connect) is greater than 225 feet.
Conversely, if the user commands this signal to toggle “High”, then it will
enable the “Transmit Line Build-Out” circuitry within the XRT7300. In this case,
the XRT7300 will output shaped pulses onto the “Transmit Line Signal”. In
order to ensure that the XRT7300 generates a line signal that is compliant
with the Bellcore GR-499-CORE Pulse Template requirements (at the DSX-3
Cross-Connect), the user is advised to set this output pin “Low”, if the cable
length (between the Transmit Output of the XRT7300 and the DSX-3 Cross
Connect) is less than 225 ft. of cable.
Writing a “1” to Bit 2 of the Line Interface Drive Register (Address = 0x72) will
cause this output pin to toggle “High”. Writing a “0” to this bit-field will cause
this output pin to toggle “Low”.
N
OTE
:
If the customer is not using the XRT7300 DS3/E3/STS-1 LIU IC, then
this output pin can be used for other purposes.
25
D1
I/O
Bi-Directional Data bus (Microprocessor Interface Section):
Please see description for D15, pin1.
26
RLOOP
O
Remote Loop-back Output Pin (to the XRT7300 DS3/E3/STS-1 LIU IC):
This output pin is intended to be connected to the RLOOP input pin of the
XRT7300 LIU IC. This output pin, along with the LLOOP input pin (pin 28) per-
mits the user to configure the XRT7300 to operate in either of the following three
(3) loop-back modes.
Analog Local Loop-back Mode
Digital Local Loop-back Mode
Remote Loop-back Mode.
Writing a “1” to bit 1 of the “Line Interface Drive Register (Address = 0x72) will
cause this output pin to toggle “High”. Writing a “0” to this bit-field will cause
the RLOOP output to toggle “Low”.
N
OTE
:
If the customer is not using the XRT7300 DS3/E3/STS-1 IC, then this
output pin can be used for other purposes.
27
D0
I/O
Bi-Directional Data bus (Microprocessor Interface Section):
Please see description for D15, pin1.
PIN DESCRIPTION (CONTINUED)
P
IN
N
O
.
S
YMBOL
T
YPE
D
ESCRIPTION
相關(guān)PDF資料
PDF描述
XRT72L73 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT72L74 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT7300IV E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7302 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
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