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參數(shù)資料
| 型號(hào)： | XRT72L71 |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 8/104頁 |
| 文件大?。?/td> | 1156K |
| 代理商： | XRT72L71 |
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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. P1.0.5
á
PRELIMINARY
8
The On-Chip Line Interface Scan Register allows
the user to monitor the state of 3 input pins. The
function of these input pins, when asserted, are
tabulated below.
FEATURES
TRANSMIT AND RECEIVE SECTIONS
UTOPIA I
NTERFACE
B
LOCKS
Compliant with UTOPIA Level 2 Interface Specifica-
tion (e.g., supports Single-PHY or Multi-PHY opera-
tion).
8-bit or 16-bit wide UTOPIA Data Bus operation in
the Transmit and Receive Directions.
The UTOPIA Data Bus runs at clock rates of 25
MHz, 33 MHz and 50 MHz
Supports both Octet-Level and Cell-Level Hand-
shaking between the UNI and the ATM Layer pro-
cessor.
The Transmit UTOPIA Interface block performs par-
ity checking of ATM cell data that is written into it,
by the ATM Layer processor. Will optionally discard
errored cells.
Contains on-chip 16 cell FIFO in the Transmit
Direction (TxFIFO)
The TxFIFO can be configured to operate with
depths of 4, 8, 12 or 16 cells
Contains on-chip 16 cell FIFO in the Receive
Direction (RxFIFO)
RLOOP
Remote Loop-Back Mode Select:
This bit-field, along with LLOOP can be used to configure the XRT7300 into one of four different loop-
back modes.
Setting RLOOP to “1” (with LLOOP = 0) configures the XRT7300 to operate in the Remote Loop-Back
Mode.
Setting RLOOP to “1” (with LLOOP = 1) configures the XRT7300 to operate in the “Digital Local Loop-
Back” Mode.
Setting RLOOP to “0” (with LLOOP = 1) configures the XRT7300 to operate in the “Analog Local Loop-
Back” Mode.
Setting RLOOP to “0” (with LLOOP = 0) configures the XRT7300 to operate in the “Normal” (No-Loop-
back) Mode.
LLOOP
Local Loop-Back Mode Select:
This bit-field along with RLOOP can be used to configure the XRT7300 into one of four different loop-
back modes.
Setting LLOOP to “1” (with RLOOP = 0) configures the XRT7300 to operate in the “Analog Local Loop-
Back” Mode.
Setting LLOOP to “1” (with RLOOP = 1) configures the XRT7300 to operate in the “Digital Local Loop-
Back” Mode.
Setting LLOOP to “0” (with RLOOP = 0) configures the XRT7300 to operate in the “Normal” (No-Loop-
Back) Mode.
Setting LLOOP to “0” (with RLOOP = 1) configures the XRT7300 to operate in the “Remote Loop-Back”
Mode.
Signal Name
Function of Output Pin
S
IGNAL
N
AME
F
UNCTION
OF
I
NPUT
P
IN
IF
ASSERTED
DMO
Indicates that the "Drive Monitor" circuitry within the XRT7300 has not detected any bipolar signals
within the last 128 ± 32 bit periods.
RLOL
Indicates that the "Clock Recovery" circuit, within the XRT7300 has lost "lock" with the incoming DS3
line signal.
RLOS
Indicates that the XRT7300 is declaring an LOS (Loss of Signal) Condition.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT72L73 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT72L74 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT7300IV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300 | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7302 | 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元) |
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參數(shù)描述 |
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