參數(shù)資料
型號： W83977CTF-AW
英文描述： PERIPHERAL (MULTIFUNCTION) CONTROLLER
中文描述： 周邊（多功能）控制器
文件頁數(shù)： 51/161頁
文件大?。?/td> 592K
代理商： W83977CTF-AW
W83977EF/ CTF
PRELIMINARY
Publication Release Date: March 1999
-42 -
Revision A1
2.2.8 Digital Input Register (DI Register) (Read base address + 7)
The Digital Input Register is an 8-bit read-only register used for diagnostic purposes. In a PC/XT or
AT only Bit 7 is checked by the BIOS. When the register is read, Bit 7 shows the complement
ofDSKCHG#
,
while other bits of the data bus remain in tri-state. Bit definitions are as follows:
x
x
Reserved for the hard disk controller
During a read of this register, these bits are in tri-state
DSKCHG
x
x
x
x
x
x
0
1
2
3
4
5
6
7
In the PS/2 mode, the bit definitions are as follows:
1
2
3
4
5
6
7
0
HIGH DENS#
DRATE0
DRATE1
DSKCHG
1
1
1
1
DSKCHG (Bit 7):
This bit indicates the complement of the DSKCHG# input.
Bit 6-3: These bits are always a logic 1 during a read.
DRATE1 DRATE0 (Bit 2, 1):
These two bits select the data rate of the FDC. Refer to the DR register bits 1 and 0 for the settings
corresponding to the individual data rates.
HIGHDENS#(Bit 0):
0 500 KB/S or 1 MB/S data rate (high density FDD)
1 250 KB/S or 300 KB/S data rate
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