
W83977EF/ CTF
PRELIMINARY
Publication Release Date: March 1999
-120 -
Revision A1
Bit 2: Enable all wake-up event set in CRE0 can wake-up the system from S1/S2 state.
This bit is cleared when wake-up event occurs.
0 = Disable.
1 = Enable.
Bit 1 - 0: Reserved.
CRE5 (Default 0x00)
Bit 7: Reserved.
Bit 6 - 0: Compared Code Length. When the compared codes are stored in the data register,
these data lengths should be written to this register.
CRE6 (Default 0x00)
Bit 7 - 6: Reserved.
Bit 5 - 0: CIR Baud Rate Divisor. The clock base of CIR is 32khz, so that the baud rate is 32khz
divided by ( CIR Baud Rate Divisor + 1).
CRE7 (Default 0x00)
Bit 7 - 3: Reserved.
Bit 2: Reset CIR Power-On function. After using CIR power-on, the software should write logical
1 to restart CIR power-on function.
Bit 1: Invert RX Data.
= 1 Inverting RX Data.
= 0 Not inverting RX Data.
Bit 0: Enable Demodulation.
= 1 Enable received signal to demodulate.
= 0 Disable received signal to demodulate.
CRF0 (Default 0x00)
Bit 7: CHIPPME. Chip level auto power management enable.
= 0
disable the auto power management functions
= 1
enable the auto power management functions.
Bit 6: URCPME. UART C auto power management enable.
= 0
disable the auto power management functions.
= 1
enable the auto power management functions.
Bit 5 - 4: Reserved. Return zero when read.
Bit 3: PRTPME. Printer port auto power management enable.
= 0
disable the auto power management functions.
= 1
enable the auto power management functions.