參數(shù)資料
型號(hào)： USS-820D
英文描述： USS-820D USB Device Controller
中文描述： 號(hào)- 820D USB設(shè)備控制器
文件頁(yè)數(shù)： 40/58頁(yè)
文件大?。?/td> 868K
代理商： USS-820D
40
Agere Systems Inc.
Data Sheet, Rev. 4
June 2001
USB Device Controller
USS-820D
Register Interface
(continued)
Table 37. Data Set Available (DSAV)—Address: 1DH; Default: 0000 0000B
This register contains receive/transmit data set available bits.
Table 38. Data Set Available (DSAV1)—Address: 1EH; Default: 0000 0000B
This register contains receive/transmit data set available bits.
Bit 7
RXAV3
R
Bit 6
TXAV3
R
Bit 5
RXAV2
R
Bit 4
TXAV2
R
Bit 3
RXAV1
R
Bit 2
TXAV1
R
Bit 1
RXAV0
R
Bit 0
TXAV0
R
Bit
7
6
5
4
3
2
1
0
Symbol
RXAV3
TXAV3
RXAV2
TXAV2
RXAV1
TXAV1
RXAV0
TXAV0
Function/Description
Receive/Transmit Data Set Available.
This feature is only available if MCSR.FEAT = 1
or TXDSAM = 1; otherwise, reads 0. May be used to improve firmware efficiency when
polling endpoints. For receive FIFOs, this register indicates that one or more data sets
are available to be read. For transmit FIFOs, this register indicates that one or more data
sets are available to be written. Bits always read 0 for endpoints which are not enabled
(RXEPEN/TXEPEN = 0). If a transmit endpoint has TXDSAM = 1, the corresponding
RXAV/TXAV bit of the DSAV register indicates instead that the TXVOID bit is set (a NAK
has been sent to the host). This usage when TXDSAM = 1 does not require
MCSR.FEAT = 1.
Bit 7
RXAV7
R
Bit 6
TXAV7
R
Bit 5
RXAV6
R
Bit 4
TXAV6
R
Bit 3
RXAV5
R
Bit 2
TXAV5
R
Bit 1
RXAV4
R
Bit 0
TXAV4
R
Bit
7
6
5
4
3
2
1
0
Symbol
RXAV7
TXAV7
RXAV6
TXAV6
RXAV5
TXAV5
RXAV4
TXAV4
Function/Description
Receive/Transmit Data Set Available.
This feature is only available if MCSR.FEAT = 1
or TXDSAM = 1; otherwise, reads 0. May be used to improve firmware efficiency when
polling endpoints. For receive FIFOs, this register indicates that one or more data sets
are available to be read. For transmit FIFOs, this register indicates that one or more data
sets are available to be written. Bits always read 0 for endpoints which are not enabled
(RXEPEN/TXEPEN = 0). If a transmit endpoint has TXDSAM = 1, the corresponding
RXAV/TXAV bit of the DSAV register indicates instead that the TXVOID bit is set (a NAK
has been sent to the host). This usage when TXDSAM = 1 does not require
MCSR.FEAT = 1.
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