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參數(shù)資料
| 型號： | USS-344 |
| 英文描述： | USS-344 QuadraBus Four-Host PCI-to-USB OpenHCL Host Controller |
| 中文描述： | 號，344 QuadraBus四主機的PCI到USB主機控制器OpenHCL |
| 文件頁數(shù)： | 7/54頁 |
| 文件大?。?/td> | 850K |
| 代理商： | USS-344 |
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Agere Systems Inc.
7
Advance Data Sheet, Rev. 9
June 2001
Four-Host PCI-to-USB OpenHCI Host Controller
USS-344
QuadraBus
Pin Information
(continued)
Table 3. USB Port Signals
(continued)
* An N following the symbol names indicates active-low for the USS-344.
Table 4. Legacy Support Signals
* An N following the symbol names indicates active-low for the USS-344.
Table 5. Chip Test Signals
* An N following the symbol names indicates active-low for the USS-344.
Pin
77
79
102
104
81
Symbol
*
PWRFLT0N
PWRFLT1N
PWRFLT2N
PWRFLT3N
CLK48STOP
Type
Input
Input
Input
Input
Bidir
Description
USB Port 0 Overcurrent (Active-Low).
USB Port 1 Overcurrent (Active-Low).
USB Port 2 Overcurrent (Active-Low).
USB Port 3 Overcurrent (Active-Low).
USB Clock Stop (Optional).
Used to stop external
48 MHz clock in PCI power management state D3.
USB Transceiver V
DD
(3.3 V).
USB Transceiver V
SS.
USB 2.0 1 k
Precision Resistor Connection.
Hi-Z if
implementation does not expect upgrade to USB 2.0.
USB 2.0 Analog Power.
Connect to V
DD
if implementa-
tion does not expect upgrade to USB 2.0.
USB 2.0 Analog Power.
Connect to V
SS
if implementa-
tion does not expect upgrade to USB 2.0.
USB 2.0 Crystal Oscillator XHI Connection.
Hi-Z if
implementation does not expect upgrade to USB 2.0.
USB 2.0 Crystal Oscillator XHI Connection/USB 1.X
CLK 48 MHz Input.
87, 93, 99
88, 94, 100
86
V
DD
T
V
SS
T
RREF
Power
Power
Input
85
V
DD
A
Power
82
V
SS
A
Power
84
XHI
Power
83
XLO/CLK48
Power/Input
Pin
68
Symbol
*
KIRQ1I
Type
Input
Description
Legacy Keyboard Controller Interrupt (IRQ1 Input from
Keyboard Controller).
Legacy Mouse Controller Interrupt (IRQ12 Input from
Mouse Controller).
Legacy Gate A20 Input.
Output/Open Drain
Legacy Gate A20 Output (to Memory Controller).
Output/Open Drain
System Keyboard Interrupt (Active-High).
Output/Open Drain
System Mouse Interrupt (Active-High).
Output/Open Drain
System Management Interrupt (Active-Low).
67
MIRQ12I
Input
69
70
71
72
75
A20I
A20MN
IRQ1
IRQ12
SMIN
Input
Pin
61
Symbol
*
TEST0
Type
Input
Description
Chip Test Signal.
Refer to Test Mode Connection
Instructions section for usage information.
Chip Test Signal.
Refer to Test Mode Connection
Instructions section for usage information.
Chip Test Signal.
Refer to Test Mode Connection
Instructions section for usage information.
Chip Test Signal.
Refer to section Test Mode Connection
Instructions for usage information.
62
TEST1
Input
63
TEST2
Input
64
TEST3
Input
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| USS-344QUADRABUS | 制造商:AGERE 制造商全稱:AGERE 功能描述:Four-Host PCI-to-USB OpenHCI Host Controller |
| USS344S-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:USS-344 QuadraBus Four-Host PCI-to-USB OpenHCL Host Controller |
| USS-4(1m) | 制造商:Ubon 功能描述:1m 1 to 0.4mm D Bulk |
| USS4350 | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:50V, 5A NPN LOW VCE(SAT) TRANSISTOR |
| USS4350G-AA3-R | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:50V, 5A NPN LOW VCE(SAT) TRANSISTOR |
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