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參數(shù)資料
| 型號(hào)： | USS-344 |
| 英文描述： | USS-344 QuadraBus Four-Host PCI-to-USB OpenHCL Host Controller |
| 中文描述： | 號(hào)，344 QuadraBus四主機(jī)的PCI到USB主機(jī)控制器OpenHCL |
| 文件頁(yè)數(shù)： | 32/54頁(yè) |
| 文件大?。?/td> | 850K |
| 代理商： | USS-344 |
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32
Agere Systems Inc.
Advance Data Sheet, Rev. 9
June 2001
Four-Host PCI-to-USB OpenHCI Host Controller
USS-344
QuadraBus
USB Registers
(continued)
Table 105. HcHCCA Register (18h)
Table 106. HcPeriodCurrentED Register (1Ch)
Table 107. HcControlHeadED Register (20h)
Table 108. HcControlCurrentED Register (24h)
Table 109. HcBulkHeadED Register (28h)
Table 110. HcBulkCurrentED Register (2Ch)
Table 111. HcDoneHead Register (30h)
Bits
Field
Reset
HCD
(Host Controller Driver)
R/W
HC
(Host Controller)
R
31:8
Host Controller Communications Area (HCCA)
Base Address
Bits 7:0 will always return a 0.
0h
Bits
31:4
Field
Reset
0h
HCD
R/W
HC
R
Period Current ED (PCED) Base Address
Bits 3:0 will always return a 0.
Bits
31:4
Field
Reset
0h
HCD
R/W
HC
R
Control Head ED (CHED) Base Address
Bits 3:0 will always return a 0.
Bits
31:4
Field
Reset
0h
HCD
R/W
HC
R/W
Control Current ED (CCED) Base Address
Bits 3:0 will always return a 0.
Bits
31:4
Field
Reset
0h
HCD
R/W
HC
R
Bulk Head ED (BHED) Base Address
Bits 3:0 will always return a 0.
Bits
31:4
Field
Reset
0h
HCD
R/W
HC
R/W
Bulk Current ED (BCED) Base Address
Bits 3:0 will always return a 0.
Bits
31:4
Field
Reset
0h
HCD
R
HC
R/W
Done Head ED (DH) Base Address
Bits 3:0 will always return a 0.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| USS-344QUADRABUS | 制造商:AGERE 制造商全稱:AGERE 功能描述:Four-Host PCI-to-USB OpenHCI Host Controller |
| USS344S-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:USS-344 QuadraBus Four-Host PCI-to-USB OpenHCL Host Controller |
| USS-4(1m) | 制造商:Ubon 功能描述:1m 1 to 0.4mm D Bulk |
| USS4350 | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:50V, 5A NPN LOW VCE(SAT) TRANSISTOR |
| USS4350G-AA3-R | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:50V, 5A NPN LOW VCE(SAT) TRANSISTOR |
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