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參數(shù)資料
| 型號： | USS-344 |
| 英文描述： | USS-344 QuadraBus Four-Host PCI-to-USB OpenHCL Host Controller |
| 中文描述： | 號，344 QuadraBus四主機的PCI到USB主機控制器OpenHCL |
| 文件頁數(shù)： | 22/54頁 |
| 文件大小： | 850K |
| 代理商： | USS-344 |
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22
Agere Systems Inc.
Advance Data Sheet, Rev. 9
June 2001
Four-Host PCI-to-USB OpenHCI Host Controller
USS-344
QuadraBus
PCI Registers
(continued)
Table 63. BIST Register (0Fh)
BIST is not supported by the USS-344.
Table 64. Base Address Register 0 (10h—13h)
The Base Address register is used to specify to the PCI operating system the memory size of the USS-344 device.
As recommended by the OpenHCI specification, the lower 12 bits are read only (fixed to logic 0) to indicate 4K
(2
12
) memory size.
Table 65. Base Address Register 1, 2, 3, 4, 5 (14h—17h), (18h—1Bh), (1Ch—1Fh), (20h—23h), (24h—27h)
These Base Address registers are unused by the USS-344 device.
Table 66. Cardbus CIS Pointer Register (28h—2Bh)
Cardbus CIS pointer not required for the USS-344.
Table 67. Subsystem Vendor ID Register (2Ch—2Dh)
The subsystem vendor ID is R/W for compliance with
Microsoft
PC98 specifications. On reset, this register is read
only. System BIOS may write a 1 to Special—Subsystem Write Capability register (4Ch) bit 0 to enable write capa-
bility of this register. After configuring this register, the system BIOS must write a 0 to Special—Subsystem Write
Capability register (4Ch) bit 0 to disable write capability of this register.
Table 68. Subsystem ID Register (2Eh—2Fh)
The subsystem vendor ID is R/W for compliance with
Microsoft
PC98 specifications. On reset, this register is read
only. System BIOS may write a 1 to Special—Subsystem Write Capability register (4Ch) bit 0 to enable write capa-
bility of this register. After configuring this register, the system BIOS must write a 0 to Special—Subsystem Write
Capability register (4Ch) bit 0 to disable write capability of this register.
Bits
Field
Read/Write
Reset/Description
7:0
BIST
R
00h
Bits
Field
Read/Write
Reset/Description
Lower 12 bits are read only. Upper
20 bits are read/write.
31:0
BAR 0
R/W
Bits
Field
Read/Write
Reset/Description
00000000h
31:0
BAR 1—5
R
Bits
Field
Read/Write
Reset/Description
00000000h
31:0
CardBus CIS Pointer
R
Bits
Field
Read/Write
Reset/Description
15:0
Subsystem Vendor ID
R/W
11C1h
Bits
Field
Read/Write
Reset/Description
15:0
Subsystem ID
R/W
5803h
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| USS-344QUADRABUS | 制造商:AGERE 制造商全稱:AGERE 功能描述:Four-Host PCI-to-USB OpenHCI Host Controller |
| USS344S-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:USS-344 QuadraBus Four-Host PCI-to-USB OpenHCL Host Controller |
| USS-4(1m) | 制造商:Ubon 功能描述:1m 1 to 0.4mm D Bulk |
| USS4350 | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:50V, 5A NPN LOW VCE(SAT) TRANSISTOR |
| USS4350G-AA3-R | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:50V, 5A NPN LOW VCE(SAT) TRANSISTOR |
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