參數(shù)資料
型號(hào): UPD61052
廠商: NEC Corp.
英文描述: MOS INTEGRATED CIRCUIT MPEG2 AUDIO/VIDEO ENCODER
中文描述: 馬鞍山集成電路MPEG2音頻/視頻編碼器
文件頁數(shù): 44/106頁
文件大?。?/td> 824K
代理商: UPD61052
Data Sheet S15082EJ4V0DS
44
μ
PD61051, 61052
(4)
Transfer data counter register
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
27H
TC18 to TC16
R/W
Transfer data count
28H
TC15 to TC8
R/W
Transfer data count
29H
TC7 to TC0
R/W
Transfer data count
It sets the transfer data number of the bytes.
In case of transfer between host CPU and SDRAM, it sets the number of the transfer bytes by 4 bytes unit. In case
of transfer from instructions ROM, SDRAM host CPU to the instruction RAM of internal CPU, it sets the number of the
transfer bytes /4 by the 4 byte unit.
(5)
Transfer data register
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
3FH
TD7 to TD0
R/W
Transfer data
This register is transfer data window.
Figure 3-6. SDRAM Write
Byte3
Byte7
Byte11
Byte15
Byte19
Byte2
Byte6
Byte10
Byte14
Byte18
Byte1
Byte5
Byte9
Byte13
Byte17
Byte0
Byte4
Byte8
Byte12
Byte16
Byte0
Byte1
Byte2
Byte3
Byte4
Byte5
Byte6
Byte7
Byte8
TD7 to TD0
SDRAM
Lower byte first
Host CPU write
Transfer buffer
(128 bytes)
SDRAM address
= DA16 to DA0×128
SDRAM address
= DA16 to DA0×128+5
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