參數(shù)資料
型號： STLC5046
廠商： 意法半導(dǎo)體
元件分類： Codec
英文描述： PROGRAMMABLE FOUR CHANNEL CODEC AND FILTER
中文描述： 可編程四通道解碼器和過濾器
文件頁數(shù)： 15/27頁
文件大小： 207K
代理商： STLC5046
ter) the 16 bits will be carried out as follows: the 8
most significative bits in the programmed time
slot, the 8 least significative bits in the following
timeslot.
Example: if T26..T20=00:
TS0
TS1
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Pin strap value (value=80h)
1
0
0
0
0
0
0
0
Referred to FS2.
TransmitTime Slot channel #3 (DXA3)
Addr=16h; Reset Value=00h
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
EN3
T36
T35
T34
T33
T32
T31
T30
EN3=0:
Selectedtransmit time slot on DX output
is in H.I.
Selectedtransmit time slot on DX output
is activecarryingout the PCM encoded
signal of VFXI3.
T36..0:Define time slot number (0 to 127) on
which PCM encoded signal of VFXI3 is carried
out.
If linear mode is selected (LIN=1 of CONF regis-
ter) the 16 bits will be carried out as follows: the 8
most significative bits in the programmed time
slot, the 8 least significative bits in the following
timeslot.
Example: if T36..T30=00:
EN3=1:
TS0
TS1
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Pin strap value (value=80h)
1
0
0
0
0
0
0
0
Referred to FS3.
Receive Time Slot channel#0 (DRA0)
Addr=17h; Reset Value=00h
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
EN0
R06
R05
R04
R03
R02
R01
R00
EN0=0:
EN0=1:
Disablereception of selectedtime slot.
Selectedreceive timeslot on DR input
isPCM decodedandtranferredtoVFRO0
output.
R06..0:Definereceive time slot number (0 to 127)
on carrying the PCM signal to be decoded and
tranferred to VFRO0 output.If linear mode is se-
lected (LIN=1 of CONF register) the 16 bits will
be used as linear code as follows: the 8most sig-
nificative bits in the programmed time slot, the 8
least significative bits in the followingtimeslot.
Example: if R06..R00=00:
TS0
TS1
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Pin strap value(value 80h):
1
0
0
0
0
0
0
0
Referred to FS0.
Receive Time Slotchannel #1 (DRA1)
Addr=18h;Reset Value=00h
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
EN0
R16
R15
R14
R13
R12
R11
R10
EN1=0:
EN1=1:
Disable reception of selectedtime slot.
Selectedreceivetime sloton DR input is
PCM decodedand tranferredto VFRO1
output.
R16..0:Definereceive time slot number (0 to 127)
on carrying the PCM signal to be decoded and
tranferred to VFRO1 output.If linear mode is se-
lected (LIN=1 of CONF register) the 16 bits will
be used as linear code as follows: the 8most sig-
nificative bits in the programmed time slot, the 8
least significative bits in the followingtimeslot.
Example: if R16..R10=00:
TS0
TS1
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Pin strap value(value=80h)
1
0
0
0
0
0
0
0
Referred to FS1.
Receive Time Slotchannel #2 (DRA2)
Addr=19h;Reset Value=00h
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
EN2
R26
R25
R24
R23
R22
R21
R20
EN2=0:
EN2=1:
Disable reception of selectedtime slot.
Selectedreceivetime sloton DR input is
PCM decodedand tranferredto VFRO1
output.
R26..0:Definereceive time slot number (0 to 127)
STLC5046
15/27
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PDF描述
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