參數(shù)資料
型號: STLC5046
廠商: 意法半導體
元件分類: Codec
英文描述: PROGRAMMABLE FOUR CHANNEL CODEC AND FILTER
中文描述: 可編程四通道解碼器和過濾器
文件頁數(shù): 12/27頁
文件大?。?/td> 207K
代理商: STLC5046
Static I/Omode:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
CIO
3
CIO
2
CIO
1
CIO
0
CIO0..3=0 The CS0..3 is a static input, DATA is
written in DATA2registerbits 0..3.
CIO0..3=1 The CS0..3 is a static output, DATA is
takenfromDATA2 register bits 0..3.
Pin strap value:
0
0
0
0
0
0
0
0
0
0
0
0
I/OData Register channel #2 (DATA2)
Addr=07h; Reset Value=00h
Addr=08h; Reset Value=X0h
If bit 4 of CONF register(STA)=0
Dynamic I/O mode:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
D2
7
D2
6
D2
5
D2
4
D2
3
D2
2
D2
1
D2
0
D2
11
D2
10
D2
9
D2
8
When CS2 is active D2
11..0
are transferred to the
corresponding I/O pins configured as outputs
(see DIR register). For the I/O pins configured as
inputs the correspondingD11..0 will be written by
the values applied to those pinswhile CS2 is low.
If bit 4 of CONF register(STA)=1
Static I/Omode:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
CD
3
CD
2
CD
1
CD
0
CD
3..0
are transferred to the corresponding CS
pin if configured as static output (see register
DATA1). For the CS pins configured as static in-
puts the corresponding CD
3..0
will be written by
the values applied to those pins.
Pin strap value:
0
0
0
0
0
0
0
0
0
0
0
0
I/OData Registerchannel #3 (DATA3)
Addr=09h;Reset Value=00h
Addr=0Ah; Reset Value=X0h
Used only if bit 4 of CONF register (STA)=0; Dy-
namic I/Omode:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
D3
7
D3
6
D3
5
D3
4
D3
3
D3
2
D3
1
D3
0
D3
11
D310
D39
D38
When CS3 is active D11..0 are transferredto the
corresponding I/O pins configured as outputs
(see DIR register). For the I/O pins configured as
inputs the correspondingD11..0 will be written by
the values applied to those pins while CS3 is low.
If bit4 of CONFregister(STA)=1
Static I/Omode:
can be used as general purpose R/W registers,
without any direct action on the control of the de-
vice.
Pin strap value:
0
0
0
0
0
0
0
0
0
0
0
0
TransmitGain channel #0 (GTX0)
Addr=0Bh; Reset Value=00h
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
00h:Stop any trasmit signal, null level is transmit-
ted in the correspondingtimeslot on DX output.
>00h:Digital gain is inserted in the TX path equal
to:
20log[0.25+0.75*(progr.value/256)]
Pin strap values:
GX0=1: 0dB gain (value = FFh):
1
1
1
1
1
1
1
1
GX0=0: -3.5dBgain (value = 8Fh):
1
0
0
0
1
1
1
1
TransmitGain channel #1 (GTX1)
Addr=0Ch; Reset Value=00h
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
00h:Stop any trasmit signal, null level is transmit-
STLC5046
12/27
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