參數(shù)資料
型號： SSTE32882HLBAKG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時鐘及定時
英文描述： SSTE SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA176
封裝： 8 X 13.50 MM, 0.65 MM PITCH, GREEN, MO-246F, CABGA-176
文件頁數(shù)： 37/69頁
文件大小： 1263K
代理商： SSTE32882HLBAKG
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
42
SSTE32882KA1
7314/5
CONFIDENTIAL - THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE
SSTE32882KA1
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
COMMERCIAL TEMPERATURE RANGE
Clock Stopped Power Down Entry and Exit with IBT On
(1) i, j only apply for QuadCS capable register. When QuadCS is enabled, i = 2, j = 3.
(2) With RC9 DBA0=’0’.
(3) When CK/CK inputs are floated, CK/CK inputs are pulled LOW by the (10K-100K Ohm) pulldown resistor in the
CK/CK input buffer.
(4) Upon CKE Power Down exit, QxCSn will be held HIGH for maximum of 1 tCK regardless of what DCSn input
level is. For all other operation QxCSn outputs will follow DCSn inputs.
DAn, DBAn
Input
n-1
QxODTn
n
pp+4
QxCKEn
DCS[j,1]
Output
DODTn
tSTAB
mm+4
Hi-Z
driven Low
Hi-Z
qp+7
m+8
x
tCKoff
tCKEV
tFixedoutput
ODT8
ODT10 ODT11
ODT9
ODT12
ODT14 ODT15
ODT13
ODT16 ODT17
Hi-Z
QxRAS,
QxWE
QxCAS,
n+4
tInDIS
DRAS
DCAS
DWE
DCKEn
High or Low
DCS[i,0]
High or Low
H, L or Hi-Z
H or L
High, Low or Toggling
Either or both DCKEn inputs are driven High
Hi-Z
Low
tFixedoutput
H, L or Hi-Z
RESET
n
n-1
Yn
QxAn,
QxBAn
H or L
High or Low
Follows Input (High, Low or Toggling)
n+4
Either or both QxCKEn outputs are driven High
QxCS[i,0]
Hi-Z
Follows Input (H or L)
High or Low
QxCSn and QxODTn transfer from Hi-Z to high/low with in-accurate phase
tQDIS
QxCS[j,1]
Follows Input (H or L)
High or Low
Hi-Z
High
PAR_IN
H, L or Hi-Z
Hi-Z
H, L or Hi-Z
Hi-Z
L or Float*
tEN
High
tACT
CK/CK
High
see Note 3
相關(guān)PDF資料
PDF描述
SSTE32882HLBBKG SSTE SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA176
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SSTE32882HLBAKG8 功能描述:寄存器 DDR3 LV REGISTER RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTE32882HLBAKG8/M 制造商:Integrated Device Technology Inc 功能描述:IC, REG 32882_LV D3-1600 176TFBGA GRN - Tape and Reel
SSTE32882HLBBKG 制造商:Integrated Device Technology Inc 功能描述:Registering Clock Driver 176-Pin CABGA Tray 制造商:Integrated Device Technology Inc 功能描述:176 BGA (GREEN) - Bulk 制造商:Integrated Device Technology Inc 功能描述:DDR3 LV REGISTER
SSTE32882HLBBKG8 制造商:Integrated Device Technology Inc 功能描述:Registering Clock Driver 176-Pin CABGA T/R 制造商:Integrated Device Technology Inc 功能描述:176 BGA (GREEN) - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:DDR3 LV REGISTER
SSTE32882KA1AKG 功能描述:寄存器 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
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